• State TI Thinks Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 1 answer
  • Subscribers 33 subscribers
  • Views 190 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DP83826E: Technical confirmation regarding changes to DP83826 RMII Leader configuration

Conor
Guru 12075 points
Part Number: DP83826E

Tool/software:

Hi,

We are currently supporting a customer who is using the DP83826 in RMII Slave (Follower) configuration, and they are considering switching to RMII Leader mode.

Could you please confirm whether the following understanding is correct?

  1. To enable RMII Leader mode, it is sufficient to strap the TX_CLK pin (pin 22) to Low.

  2. Additionally, RX_D2 (pin 14) should be strapped High to select RMII mode.

  3. In RMII Leader mode, a 25 MHz crystal can be connected to XO (pin 8) and XI (pin 9), and a 50 MHz output clock will be generated from RX_CLK (pin 19) via the internal PLL.

  4. The only difference between RMII Leader and Follower is the direction of the clock. The data signals such as TX_EN, TX_D[1:0], RX_D[1:0], and CRS_DV remain unchanged in polarity and wiring.

Best regards,
Conor

  • 0
    TI__Guru**** 176721 points

    Conor

    Your general understanding of the DP83826E strapping configuration for RMII leader mode is correct. You can use the attached spreadsheet to further confirm the configuration setting. 

    snlr050b.zip

    Your understanding on the clock implementation is also correct. 

    Thanks
    David

  • 0 in reply to David (ASIC) Liu
    Guru 12075 points

    Hi David,

    We would like to confirm the following two points regarding the RMII Master configuration of the DP83826.

    First, according to the BasicMode Strap Tool (attached as checklist1.png), RMII Master mode is shown as Strap4 = 1 and Strap10 = 1. However, in Table 9-15 of the datasheet (MAC Mode Selection Strap Table), RMII Master mode is defined as Strap4 = 1 and Strap10 = 0. This appears to be inconsistent. Could you please confirm that Table 9-15 is the correct setting for RMII Master mode?

    Second, the BasicMode Schematic Checklist (attached as checklist2.png) shows that the 50 MHz clock output is provided on RX_DV (pin 18). However, our understanding so far has been that the 50 MHz clock output in RMII Leader mode is from RX_CLK (pin 19). Could you clarify which pin actually provides the 50 MHz output in RMII Master configuration?

    Additionally, the checklist suggests that the CRS_DV signal is mapped to RX_D3 (pin 13) in RMII Master mode. Is it correct that the CRS_DV output changes from pin 18 to pin 13 depending on the operating mode? Normally, we expect CRS_DV to be output on pin 18, so we would appreciate clarification on whether this behavior is mode-dependent.

    Best regards,

    Conor

  • 0 in reply to Conor
    TI__Guru**** 176721 points

    Conor

    Please see my comments below.

    First, according to the BasicMode Strap Tool (attached as checklist1.png), RMII Master mode is shown as Strap4 = 1 and Strap10 = 1. However, in Table 9-15 of the datasheet (MAC Mode Selection Strap Table), RMII Master mode is defined as Strap4 = 1 and Strap10 = 0. This appears to be inconsistent. Could you please confirm that Table 9-15 is the correct setting for RMII Master mode?

    Please follow the table as the table is correct regarding the RMII Master Mode strapping. For RMII Master Mode in basic mode, Strap 4 = 1 and Strap 10 = 0. We will fix the spreadsheet to correct this mistake.

    Second, the BasicMode Schematic Checklist (attached as checklist2.png) shows that the 50 MHz clock output is provided on RX_DV (pin 18). However, our understanding so far has been that the 50 MHz clock output in RMII Leader mode is from RX_CLK (pin 19). Could you clarify which pin actually provides the 50 MHz output in RMII Master configuration?

    Correct, in RMII master mode, RX_CLK provides 50MHz reference clock to the MAC.

    Additionally, the checklist suggests that the CRS_DV signal is mapped to RX_D3 (pin 13) in RMII Master mode. Is it correct that the CRS_DV output changes from pin 18 to pin 13 depending on the operating mode? Normally, we expect CRS_DV to be output on pin 18, so we would appreciate clarification on whether this behavior is mode-dependent.

    This is not correct. RX_DV/CRS_DV (pin 18) acts as CRS_DV and combines the RMII carrier and receive data valid indications when in RMII mode.

    I apologize for the mistake in the schematic checklist and we will fix these errors ASAP.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Guru 12075 points

    Hi David,

    Thank you for your reply. I have one additional thing to confirm regarding your comment.

    Our understanding is that the RMII master/slave mode is determined by the strap settings on RX_DV (PIN18, Strap10) and COL (PIN28, Strap4), while the direction of the 50MHz clock output (i.e., whether the PHY acts as a clock source) is independently configured using TX_CLK (PIN22, Strap5).

    In other words, the RMII communication mode (master/slave) and the RMII clock direction setting (Leader/Follower) are controlled independently.

    Based on this, is it valid to configure the device in RMII slave mode (Strap4 = 0, Strap10 = 1) while also setting TX_CLK = 0 to enable 50MHz clock output from the PHY?

    We would appreciate it if you could confirm whether this understanding is correct.

    Best regards,
    Conor

  • 0 in reply to Conor
    TI__Guru**** 176721 points

    Conor

    In BASIC mode, RX_DV (PIN18, Strap10) and COL (PIN28, Strap4) are used to determine among MAC, RMII Leader, RMII Follower mode. TX_CLK as a strap pin is not used.

    So it is not valid to configure the PHY in RMII slave and expect the PHY to output the 50MHz clock. In RMII slave mode, the PHY has to receive the CLK either from an external 50MHz reference lock or 50MHz clock from the MAC.

    Thanks

    David