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ONET1151L: I2C errors

Rohan Patel
Prodigy 50 points
Part Number: ONET1151L
Other Parts Discussed in Thread: ONET1151P

Tool/software:

Hi,

I am using ONET1151L and ONET1151P on my board. When reading/writing through I2C we are experiencing inconsistencies. When initializing the registers, sometimes writes don't take. When reading registers back, the value of the register changes even for registers that should remain static like register 0x0 which is a control settings. Both devices are on the same I2C bus.

I have attached scope captures that show readings of ONET1151L when register 0 was set to 0xD4. This read shows that the contents of the register are indeed 0xD4. Green = SCL, Red = SDA

After a certain amount of reads where the value of the register was 0xD4, we see that the value of the I2C bus read 0xD5. when we read it again it was correctly reporting 0xD4 again
When we do see this it is usually the LSB that changes but we have also seen random bits change as well.

We also see the device NAK sometimes during these scope captures.

The I2C bus looks good and it seems like the device is intentionally driving the the wrong value. Has this been seen before? Is there something causing this inconsistency? 

Thank you,

Rohan

  • 0
    TI__Mastermind 39143 points

    Hi Rohan,

    Thanks for sharing details and scope captures on this.  I haven't seen this behavior before.  Would it be possible to share a schematic of your board?  You can share over E2E private message.

    Thanks,

    Drew

  • 0 in reply to Drew Miller1
    Prodigy 50 points

    Hi Drew,

    For the ONET1151P, do you know what the VIH and VIL levels are for SDA and SCL?

    Thanks,

    Rohan

  • 0 in reply to Drew Miller1
    Prodigy 50 points

    Do you have more I2C specifications for ONET1151L? We're looking for hysteresis information and output drive levels for SDA and SCL.

    The problem seems to be the rise time. Our rise time is ~230ns which is below the level stated in the datasheet (300ns) but we get this issue. When we isolated the I2C bus and had a different I2C master, the rise time was 50ns and we did not experience any errors. Is there a rise time below 300ns we should be targeting?

  • 0 in reply to Rohan Patel
    TI__Mastermind 39143 points

    Hi Rohan,

    Glad to hear that faster rise time seems to mitigate this issue.  Unfortunately, there does not seem to be much information on the SDA/SCL pins for these devices.

    I'm not aware of any sort of errata regarding the SDA/SCL rise time, but I'm wondering if you might be able to try a lower resistance pullup resistor.

    For 400 kHz I2C, I typically see a pullup resistor of 2-5kOhm.  It is surprising to me to see internal pullups in the 10k-40kOhm range.

    Thanks,

    Drew