DS160PR421: Redriver DS160PR421

Hi Arvind,

Arvind Kumar said:

1) What basic parameters should I consider?

If this is your first time working with TI redrivers, our application note explaining the working principles of the redriver may be helpful: https://www.ti.com/lit/an/snla461/snla461.pdf 

Redrivers are designed to help compensate for insertion loss that exceeds the budget permitted by design requirements or the signal protocol. So for planning, it's best to analyze your project with as much detail as possible:

• If I remember correctly, the PCIe Gen 3 specification allows for 22 dB of insertion loss at 4 GHz. You said your limitation is that your PCIe Gen 3 lines should be under 3 inches:
  • Do you know how much insertion loss at 4 GHz the 3 inches on your board is equivalent to?
  • Do you know the total link loss (includes root complex and endpoint insertion loss) on your board or system when the traces are 3 inches?
• The DS160PR421 is a redriver mux with 8 RX channels and 4 TX channels. From what I understand it sounds like you are just routing signals directly and probably would not need the mux function. If that is the case, I would recommend the DS160PR410 redriver (4 RX and 4 TX channels) which is less complex and also supports EEPROM 

Arvind Kumar said:

2) After using redriver how much max trace length, I can route?

From the datasheet, the DS160PR421 has a maximum 4 GHz CTLE boost of 11 dB and our other Gen 4 redriver products are similar. So in theory the reach extension of total link loss should be approximately an extra 50% over the 22 dB PCIe Gen 3 budget. From my practical experience I would say 40-45% reach extension is possible with experimentation. I can't say how that translates to the maximum trace length in your case, because the total link loss calculations also include the root complex and endpoint loss as I mentioned before.

Arvind Kumar said:

3) Is above redriver follow"PCI_Express_Base_Specification_Revision_3.0" standard?

The DS160PR421 is designed and tested for PCIe Gen 4 but it is also backwards compatible with PCIe Gen 3.

Arvind Kumar said:

4) I am having 1RX pair , 1TX pair and 1CLK pair, So should I use redriver for PCIe Differential Clock also? 

The PCIe 100 MHz clock has much lower frequency than the PCIe data signals so it is not subject to nearly as much signal degradation. I have not encountered any applications where the PCIe clock needed signal conditioning, and even if it did, the redriver would not be the appropriate IC to operate on it.

Best,

Evan Su