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TXE8124-Q1: TXE81xx

Part Number: TXE8124-Q1
Other Parts Discussed in Thread: TXE8124,

Tool/software:

hi, 

A question about TXE8124 latched output. 

1. how to understand this sentence "Latched outputs with high-current drive maximum
capability for directly driving LEDs" ?

2.  See picture below, TXE8124 is powered by always-on 3.3V power rail , and reset is pulled up by this always-on 3.3V through 10K.

MCU SPI signals connect to TXE8124 , and control P0.0 to HIGH level.

My question: if MCU is power down, but TXE8124 still powered and there is no reset , can P0.0 keep HIGH level ?

thanks!

  • Hi Bin,

    1. how to understand this sentence "Latched outputs with high-current drive maximum
    capability for directly driving LEDs" ?

    A GPIO configured to OUTPUT on the TXE8124-Q1 maintains its logic HIGH or LOW output with mA of current capability - more than enough to drive an LED. This output is push-pull type, so it strongly drives HIGH or LOW depending on how the OUTPUT pin is configured. This is what we mean by "latched". The output is not weakly driven as to be influenced externally by another device connected to its output. 

    My question: if MCU is power down, but TXE8124 still powered and there is no reset , can P0.0 keep HIGH level ?

    This is true. As long as the TXE8124 has been configured to OUTPUT before-hand, its I/O's will remain the configured output logic state given that TXE8124-Q1 has power on VCC and /RESET is pulled HIGH. 

    Regards,

    Tyler