Tool/software:
Hi Team,
We are currently working on the bring-up of the TI SN65DSI84 DSI-to-LVDS bridge on our QCS615-based platform, running Linux kernel version 6.6.
As part of the validation, we enabled the test pattern generation feature in the SN65DSI84 driver. However, the test pattern displayed on the LVDS panel is unclear and distorted (see attached image for reference).
0181.G133HAN01V1 final spec ver 1.0_20190513.pdf.pdf
static const struct display_timing multi_inno_mi0800ft_9_timing = {
.pixelclock = { 134000000, 141200000, 149000000 },
.hactive = { 1920, 1920, 1920 },
.hfront_porch = { 39, 58, 77 },
.hback_porch = { 59, 88, 117 },
.hsync_len = { 28, 42, 56 },
.vactive = { 1080, 1080, 1080 },
.vfront_porch = { 3, 8, 11 },
.vback_porch = { 5, 14, 19 },
.vsync_len = { 4, 14, 19 },
};
static const struct panel_desc multi_inno_mi0800ft_9 = {
.timings = &multi_inno_mi0800ft_9_timing,
.num_timings = 1,
.bpc = 8,
.size = {
.width = 293,
.height = 165,
},
.delay = {
.prepare = 200,
.enable = 50,
.disable = 50,
.unprepare = 1000,
},
.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA,
.connector_type = DRM_MODE_CONNECTOR_LVDS,
};
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "qcs615-smarc.dts"
/ {
backlight0: backlight-lcd0 {
compatible = "pwm-backlight";
//pwms = <&pwm0 0 50000>; // adjust controller, channel, and period
brightness-levels = <0 50 100 150 200 255>;
default-brightness-level = <3>;
enable-gpios = <&tlmm 115 GPIO_ACTIVE_HIGH>; // LCD0_BKLT_EN
pinctrl-names = "default";
pinctrl-0 = <&lcd0_bklt_en &lcd0_bklt_pwm>;
};
panel-lvds@0 {
compatible = "multi-inno,mi0800ft-9";
status = "okay";
width-mm = <293>;
height-mm = <165>;
// backlight = <&backlight0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>; // LVDS A (Odd pixels)
dual-lvds-odd-pixels;
lvds_panel_out_a: endpoint {
remote-endpoint = <&sn65dsi84_out_a>;
};
};
port@1 {
reg = <1>; // LVDS B (Even pixels)
dual-lvds-even-pixels;
lvds_panel_out_b: endpoint {
remote-endpoint = <&sn65dsi84_out_b>;
};
};
};
};
};
/delete-node/ &mdss_dsi0_out;
&i2c1 {
clock-frequency = <400000>;
status = "okay";
adv7535@3d {
status = "disabled";
};
sn65dsi84: sn65dsi84@2c {
compatible = "ti,sn65dsi84";
reg = <0x2c>;
enable-gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
ti,dsi-lanes = <4>;
ti,lvds-format = "jeida-24";
//ti,lvds-format = <0>;
ti,lvds-bpp = <24>;
ti,dual-channel;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
sn65dsi84_in: endpoint {
data-lanes = <0 1 2 3>;
remote-endpoint = <&mdss_dsi0_out>;
};
};
port@2 {
reg = <2>;
sn65dsi84_out_a: endpoint {
data-lanes = <0 1 2 3>;
remote-endpoint = <&lvds_panel_out_a>;
};
};
port@3 {
reg = <3>;
sn65dsi84_out_b: endpoint {
data-lanes = <0 1 2 3>;
remote-endpoint = <&lvds_panel_out_b>;
};
};
};
};
};
&mdss_dsi0 {
vdda-supply = <&vreg_l11a>;
status = "okay";
ports {
port@1 {
reg = <1>;
mdss_dsi0_out: endpoint {
remote-endpoint = <&sn65dsi84_in>;
data-lanes = <0 1 2 3>;
attach-bridge;
};
};
};
};
Additional observations:
When the test pattern is disabled, the LVDS panel only shows the backlight, with no image or signal being displayed.
Our hardware configuration is as follows:
LVDS A carries odd pixels
LVDS B carries even pixels
For your reference, we have attached:
The relevant device tree snippet. (qcs615-smarc-lvds.dts)
The panel settings (panel_timing_settings.txt)
The panel datasheet (G133HAN01V1 final spec ver 1.0_20190513.pdf.pdf)
We would appreciate your guidance in resolving this issue and ensuring proper image display via the SN65DSI84 bridge.
Regards,
Sudarshan
