Tool/software:
Hi
I am currently using the TUSB1210BRHBR in my design.
I have measured the output delay of NXT and DIR, and both are consistently below 1.2 ns.


Here are the details of my testing environment:
FPGA : XCAU7P-L1SBVC484I
Oscilloscope: 3-Series MDO Mixed-Domain
Probe: TPP1000
Clock is Output Mode.
The datasheet for the TUSB1210BRHBR specifies an output delay range of 1.2 ns to 5.5 ns.

According to the ULPI 1.1 specification, the delay should be less than 9.0 ns.

Are there any potential risks or concerns with operating outside the datasheet specifications, even though the ULPI specification is met?
Thanks and Best Regards
Chunli Liang