Tool/software:
Hi team,
Regarding to Errata 1 (Using Serial Interrupts may result in multiple MSI messages being sent.),
is it possibgle that the XIO2001 sends corrupted TLP from PCIe Port side when high traffic
situation and Max Payload size is 256 Byte (larder then 200Byte)?
The XIO2001 is mounted on our developing board. At the PCIe side, it is connected to PCIe Root Port.
At the PCI Local Bus side, there are 3 PCI slots and PCI 1GbE LAN Cards are set.
When we inject LAN traffic to those 3 PCI LAN cards for about 10 hours, the PCIe Root Port detects
a Malformed TLP. A header log which is recorded at the PCIe Root Port is the following.
HEADER LOG0: 0xA532_1E68
HEADER LOG1: 0xA002_CEA5
HEADER LOG2: 0x0000_0000
HEADER LOG3: 0x0000_0000
*We think that this TLP is corrucpted (TLP Type A5h is not defined in PCIe Specification) .
But when we set Max Payload Size at the PCIe side to 128Byte and inject same traffic,
we had not seen Malformed TLP for over 72 hours.
[PCI Configuration register settings]
At the PCIe Port of the XIO2001, the INTx emulation interrup is uesed.
- Interrupt Disable bit (Command Register) is 0b.
- MSI Enable bit (Message Control Register) is 0b.
Best regards,
Kyohei
