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DP83TD510E: Configuration with DP83822I for 10BASE-T1L media converter mode

Part Number: DP83TD510E
Other Parts Discussed in Thread: DP83822I,

Tool/software:

I’d like to ask a few questions about using TI’s DP83TD510E 10BASE-T1L PHY in media converter mode with DP83822I.

I want use DP83TD510E with DP83822I as a 10BASE-T1L to 10BASE-T media converter without a MDIO/MDC connection between the two PHY’s and with only hardware bootstrapping, no software/MCU.

Looking at the DP83TD510E-EVM User Manual, DP83TD510E datasheet, and DP83822I datasheet, it looks like the EVM configures things as follows:
*    DP83TD510E is in RMII master mode (RX_D1-1 is pulled high by R84 and LED_0-1 is pulled low by R92)
*    DP83822I is in RMII slave mode with a 50MHz reference clock (RX_DV is pulled up by 2.49k on R103 so RMII_EN=1 and XI_50=1, while RX_ER has no PU/PD so RGMII_EN=0)
*    DP83822I auto-negotiates but only advertises 10BASE-Te, Half-Duplex (AN_EN=1, AN_1=0, AN_0=0 because J19 is pulled down)

Testing in this configuration works, but the Linux host I connected to detects full duplex even though the bootstrap seems to only negotiate half duplex.

Looking at the DP83TD510E datasheet section 6.3.3 “Media Converter” and figure 6-3, this shows the T1L and T1e PHY both in RMII slave mode and says nothing about whether the T1e Ethernet PHY should be configured as forcing 10Mbps half duplex, forcing full duplex, or allowing auto-negotiation of half vs full duplex (both 10Mbps of course).

From general research, it seems like a MAC and a PHY have to agree on whether the link is half duplex or full duplex. In DP83TD510E media converter mode, what duplex should the Ethernet PHY (DP83822I here) be configured for?

Also, it seems like the DP83TD510E-EVM is a standard media converter application, but it configures the DP83TD510E as a RMII master while the datasheet section 6.3.3 and figure 6-3 show the DP83TD510E in RMII slave mode for media converter operation. Should I follow the eval board or datasheet for best compatibility and reliability?

  • Hi Morgan, 

    I wanted to double check some things about the setup. I would double-check the bootstrapped mode on the 822 using registers 0x467 and 0x468. Additionally, I would also verify the duplexity on the 822 side using register 0x0010[2]. 

    Since the 510 negotiates a full duplex link, I would recommend that you strap the 822 to full duplex as well. Choosing half duplex on one may lead to buffer overflow.

    On the EVM, the crystal is not connected to the 822 PHY because the resistors R136 and R138 are both DNP, which is why the 510 is configured as RMII Master. In this configuration, the 822 gets its clock from the 510 instead of the crystal. You could also use the 822 in RMII Master mode, but that would require placing these resistors.

    Best,

    Vivaan