Tool/software:
Hello We Used TUSB8020BIPHP Hub With Variscite IMX8MP SOM Kindly Review the Schematic the USB Hub is not Detect in our kernel
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Tool/software:
Hello We Used TUSB8020BIPHP Hub With Variscite IMX8MP SOM Kindly Review the Schematic the USB Hub is not Detect in our kernel
Hi Jignish:
Can you send PDF file which include upstream port connection?
Best
brian
USB HUB DETECTED WHEN WE REMOVE EEPROM BUT Whenever we go to downstream port in kernel its show USB debouncing
Hi Jignesh:
Was SS_DN2 floating?
Was empty EPROM installed?
Did crystal oscillating?

Regards
Brian
Answer:
1. SS_DN is Pull-Up
2. EEPROM is Empty.
3.Yes Crystal oscillating proper We get VID PID
Can you remove C211 on R1 first and see if working?
If still has issue , please remove R150/R151 on SCL/SDA.
Best
Brian
Thanks i appreciate your quick response
Right now we are not in office due to india IST can you share the your email id or what will be next step if issue not solved after changes
Please accept my friendship request and I can send my email address to you.
Best
Brian
8027 is USB2 hub, not sure why didn't see USB3 hub 8025.
Can you provide schematic for where hub upstream is connected to ?

Regadrs
Brian
04.pdfHere is Connect the Upstream port
We also crisscross the connection and Provide VBUS 5V Supply In
you need to make sure, hub SSTX_UP is connected to host SSRX.
hub SSRX_UP is connected to host SSTX.
Best
Brian
Is this the total length from host to hub? 61mm is about 2.5in and should be ok for USB3 5G signal.
are there any other USB cable between host and hub?
Best
brian
usb hub schematic is Ohk ??
yes
Does any firmware upload required in EEPROM
no firmware to load from EEPROM, SOC should load general hub driver, unless there is no USB3 hub driver in your system.
Best
Brian
usb3_phy0: usb-phy@381f0040 {
compatible = "fsl,imx8mp-usb-phy";
reg = <0x381f0040 0x40>;
clocks = <&clk IMX8MP_CLK_USB_PHY_ROOT>;
clock-names = "phy";
assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>;
assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB_PHY1>;
#phy-cells = <0>;
status = "disabled";
};
usb3_0: usb@32f10100 {
compatible = "fsl,imx8mp-dwc3";
reg = <0x32f10100 0x8>,
<0x381f0000 0x20>;
clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
<&clk IMX8MP_CLK_USB_SUSP>;
clock-names = "hsio", "suspend";
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>;
#address-cells = <1>;
#size-cells = <1>;
dma-ranges = <0x40000000 0x40000000 0xc0000000>;
ranges;
status = "disabled";
usb_dwc3_0: usb@38100000 {
compatible = "snps,dwc3";
reg = <0x38100000 0x10000>;
clocks = <&clk IMX8MP_CLK_USB_ROOT>,
<&clk IMX8MP_CLK_USB_CORE_REF>,
<&clk IMX8MP_CLK_USB_SUSP>;
clock-names = "bus_early", "ref", "suspend";
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb3_phy0>, <&usb3_phy0>;
phy-names = "usb2-phy", "usb3-phy";
snps,gfladj-refclk-lpm-sel-quirk;
snps,parkmode-disable-ss-quirk;
};
};
usb3_phy1: usb-phy@382f0040 {
compatible = "fsl,imx8mp-usb-phy";
reg = <0x382f0040 0x40>;
clocks = <&clk IMX8MP_CLK_USB_PHY_ROOT>;
clock-names = "phy";
assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>;
assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB_PHY2>;
#phy-cells = <0>;
status = "disabled";
};
usb3_1: usb@32f10108 {
compatible = "fsl,imx8mp-dwc3";
reg = <0x32f10108 0x8>,
<0x382f0000 0x20>;
clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
<&clk IMX8MP_CLK_USB_SUSP>;
clock-names = "hsio", "suspend";
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>;
#address-cells = <1>;
#size-cells = <1>;
dma-ranges = <0x40000000 0x40000000 0xc0000000>;
ranges;
status = "disabled";
usb_dwc3_1: usb@38200000 {
compatible = "snps,dwc3";
reg = <0x38200000 0x10000>;
clocks = <&clk IMX8MP_CLK_USB_ROOT>,
<&clk IMX8MP_CLK_USB_CORE_REF>,
<&clk IMX8MP_CLK_USB_SUSP>;
clock-names = "bus_early", "ref", "suspend";
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb3_phy1>, <&usb3_phy1>;
phy-names = "usb2-phy", "usb3-phy";
snps,gfladj-refclk-lpm-sel-quirk;
snps,parkmode-disable-ss-quirk;
};
};
&usb3_phy0 {
fsl,phy-tx-vref-tune = <0xe>;
fsl,phy-tx-preemp-amp-tune = <3>;
fsl,phy-tx-vboost-level = <5>;
fsl,phy-comp-dis-tune = <7>;
fsl,pcs-tx-deemph-3p5db = <0x21>;
fsl,phy-pcs-tx-swing-full = <0x7f>;
status = "okay";
};
&usb3_0 {
status = "okay";
};
&usb_dwc3_0 {
dr_mode = "otg";
hnp-disable;
srp-disable;
adp-disable;
usb-role-switch;
role-switch-default-mode = "none";
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
status = "okay";
port {
usb3_drd_sw: endpoint {
remote-endpoint = <&typec_dr_sw>;
};
};
};
&usb3_phy1 {
fsl,phy-tx-preemp-amp-tune = <3>;
fsl,phy-tx-vref-tune = <0xb>;
status = "okay";
};
&usb3_1 {
status = "okay";
};
&usb_dwc3_1 {
dr_mode = "host";
status = "okay";
};
typec@3d {
compatible = "nxp,ptn5150";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_extcon>;
reg = <0x3d>;
interrupt-parent = <&gpio1>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
irq-is-id-quirk;
status ="okay";
port {
typec_dr_sw: endpoint {
remote-endpoint = <&usb3_drd_sw>;
};
};
};
HI Jignesh:
Since EVM works fine, hub driver should be good for the system.
Can you measure resistance from host SSTX to hub SSRX_UP to see if connection is good.
Best
Brian
Let me chech brian is any modification required or any other step required to check in schematic as well as bringup level
I dont' see another schematic to check since USB2 hub can be recognized. Only suspect USB3 connection for upstream port.
Best
brian
So As attached schematic earlier is good for selected part number TUSB8020BIPHP
Is attached device tree file is ok ???
Can we connect via mail??
Hello brian we change C93 and C96 capacitor now HUB is working And downstream port 1 is detected but Down stream port USB 2.0 device not detected
Hello brian we change C93 and C96 capacitor now HUB is working And downstream port 1 is detected but Down stream port USB 2.0 device not detected
we need 3.0 signal on downstream port 1 and usb 2.0 signal only in downstream port 2 so that's why we take 3.0 signal on port 1 and port 2 we take only USB 2.0 pin out