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Original question:

TCAN1145-Q1: Frame OVF without msg reception

TCAN1145-Q1: method to handling FRAME_OVF

Donnie Kim
Prodigy 170 points
Part Number: TCAN1145-Q1

Tool/software:

Hi team

I have further questions related the previous questions.

It appears that a FRAME_OVF error occurred in Standby mode, and SWERR was set as a result.

To resolve this, I cleared FRAME_OVF, but SWERR was not cleared.

During testing, I also cleared CANINT, and SWERR appeared to be cleared.

Therefore, I have additional questions regarding the following:

1. As shown below, SWERR and CANINT appear to be unrelated.


When clearing SWERR due to FRAME_OVF, do I need to clear both FRAME_OVF and CANINT simultaneously?

2. Do they need to clear PWRON, LWU, CANINT, and FRAME_OVF even during a normal transition? Or are there any concerns about clearing them?

3. Could you please explain what register corresponds to SYSERR in the Autosar specification?

  • Regarding SYSERR, the AUTOSAR CanTransceiver specification is as follows. 

  • SYSERR is written abstractly, as shown in the example, and is described as a configuration error.

SYSERR is determined when the SWERR flag in the INT_3 register is set. I'd like to inquire whether the SYSERR in the AUTOSAR specification above could refer to the SWERR flag for the TCAN1145.

Thank you.

Best Regards,

Donnie Kim

  • +1
    TI__Guru 50496 points

    Hi Donnie,

    1. Yes, you should clear both the specific error (FRAME_OVF in INT2) and then clear SWERR (INT_3/CANINT) once no other INT_3 bits remain set.

    I.e., It seems FRAME_OVF in standby raises its bit in INT_2 and also forces the global SWERR bit in INT_3. Hence, clearing FRAME_OVF only clears that bit in INT_2 and do not clear SWERR in INT_3. SWERR seems to only clear when the entire interrupt-pending register (INT_3) is a 1 in the SWERR position and no other bits remain set. Therefore, to recover from FRAME_OVF and get SWERR back to 0,  you should clear both.

    2. You only need to clear PWRON, LWU, CANINT, and FRAM_OVF when their conditions have been handled. Such clearing is okay but can blur real events.

    I.e,, not necessary to clear on every mode transition and no harm in clearing a bit that is not set. However, clearing prematurely may hide the fact that you just came out of reset or wake and would recommend to only clear what you have intentionally handled.

    3.It seems to be best implemented by monitoring / clearing the SWERR bit. I.e. SYSERR is defined as a generic level error - OR-ed into the SWERR bit of INT_3 and should map SWERR to SYSERR status, thanks.

    Best Regards,

    Michael.

  • 0 in reply to Michael Ikwuyum
    TI__Prodigy 170 points

    Hi Michael,

    Thank you for the detailed explanation.

    It is very helpful!!

    Best Regards,

    Donnie Kim