TUSB7320: There are cases where the TUSB7320 fails to start.

hisashi yoda

Part Number: TUSB7320
Other Parts Discussed in Thread: TUSB7340

Tool/software:

This is an inquiry regarding the startup of the TUSB7320.

We have added the constraints you previously advised, but after the TUSB7320 starts up, there is an issue where PCIe does not output.

Occurs 9 times out of 267 times.

TUSB7320: Cannot connect USB 2.0 devices（Additional question） - Interface forum - Interface - TI E2E support forums

Could you please tell me what other constraints should be added besides the ones below?

•The reset period of GRST must be Min. 3ms.

•The input/output terminal for the GRST terminal is not determined until both the 3.3V and 1.1V power supplies are turned on.

•Recommend to add a capacitor ( > 0.1uF 0.1uF±20% ) on GRST to ground.

Regards

Yoda

1 month ago

0 Brian Zhou 1 month ago

TI__Guru*** 144735 points

Hi Yoda:

Did we try to use 1uf cap on GRSTz before?

What driver used in your system?

Regards

Brian

0 hisashi yoda 1 month ago in reply to Brian Zhou

Intellectual 640 points

Hi Brian:

Thank you for your reply.

>Did we try to use 1uf cap on GRSTz before?

->Yes, we use a 1uF capacitor.

>What driver used in your system?

->Are you asking about the signal that controls GRST?

GRST is controlled by a general-purpose FPGA.

Regards

Yoda

0 Brian Zhou 1 month ago in reply to hisashi yoda

TI__Guru*** 144735 points

HI Yoda:

I asked waht driver used for TUSB7340, Windows or Linux.

Best

Brian

0 hisashi yoda 1 month ago in reply to Brian Zhou

Intellectual 640 points

Hi Brian:

The driver is neither Windows nor Linux.

This time again, the PCIE signal is not being output from the TUSB7320.

Regards

Yoda

0 Brian Zhou 1 month ago in reply to hisashi yoda

TI__Guru*** 144735 points

Hi Yoda:

Is this for the same product as previous E2E link we discussed last year?

What is final waveform for power supply?

What is schematic for PCie side?

Regards

brian

0 hisashi yoda 1 month ago in reply to Brian Zhou

Intellectual 640 points

Hi Brian:

>Is this for the same product as previous E2E link we discussed last year?

->It's the same product.

>What is final waveform for power supply?

->Power supply regulations are observed. 1.1V(yellow) and 3.3V(blue) power supply waveforms are sent.

>What is schematic for PCie side?

->The TUSB7320 is connected to the FPGA's PCIE transceiver. A switch is inserted between the two.

Regards

Yoda

0 Brian Zhou 1 month ago in reply to hisashi yoda

TI__Guru*** 144735 points

Hi Yoda:

Do you have waveform between 3.3v/1.1v/GRST/PCIE_REFCLK/PERST?

Best

Brian

0 hisashi yoda 1 month ago in reply to Brian Zhou

Intellectual 640 points

Hi Brian:

We got the waveform.

-3.3V/1.1V/GRST/PERST (measures the low period of GRST)

-3.3V/1.1V/GRST/PERST (measured between GRST and PERST)

3.3V/PCIE_REFCLK Enable(*)

*PCIE_REFCLK is an enable signal that controls the output of PCIE_REFCLK. H is output.

Regards

Yoda

0 Brian Zhou 29 days ago in reply to hisashi yoda

TI__Guru*** 144735 points

1: is it possible to remove 1st pulse on GRST?

2: Can PERST on <1s after VDD33 is on?

How many device has the same issue?

Best

Brian

0 hisashi yoda 29 days ago in reply to Brian Zhou

Intellectual 640 points

Hi Brian:

1: is it possible to remove 1st pulse on GRST?

->No.

In a discussion a year ago, we confirmed with TI that the GRST signal input and output are undefined until both the 3.3V and 1.1V power supplies are powered up.

For this reason, the terminal is left floating until the 3.3V and 1.1V power supplies are powered up.

The pulse is the effect of the internal resistor on the GRST terminal of the TUSB7320.

2: Can PERST on <1s after VDD33 is on?

->No. The software will not start within 1 second.

How many device has the same issue?

->There were four cases in the past year, and this is the 5th.

Regards

Yoda

0 Brian Zhou 29 days ago in reply to hisashi yoda

TI__Guru*** 144735 points

Hi Yoda:

Since this is already in production and only few devices had issue, Can you work with local CQE to get support from Ti quality team?

Best

Brian