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DS125BR111: seting of AD{0:3}

Part Number: DS125BR111
Other Parts Discussed in Thread: DS100BR111,

Tool/software:

hi

are the SMBus address lines able to be changed whilst powered or is a PWDN required to re-latch them?

we are driving the AD lines after power up from an FPGA.

data sheet appears to to detail this.

regards

  • Hi Adrian,

    We're checking on this and will get back to you this week.

    Thanks,

    Drew

  • thanks, read the datasheet fully but no mention of dynamic powered address change. just need to know as this would affect design.

  • Hi Adrian,

    I do not have a DS125BR111 on hand, but have a DS100BR111.  These are very similar devices, so I expect the results of my test to apply to DS125BR111.

    Based on my testing, the SMBus address is latched at PoR.  In order to re-latch the address, you will need to power cycle the device.

    Test:

    • DS100BR111 in SMBus slave mode
    1. Power on device with AD[3:0] = 4b0000.
    2. Read registers 0x00-0x06 with address 0x58: 00 00 00 00 00 00 10
    3. Change to AD[3:0] = 4b0001
    4. Read registers 0x00-0x06 with address 0x58: 00 00 00 00 00 00 10
    5. Read registers 0x00-0x06 with address 0x59: NACK
    6. Power cycle the device
    7. Read registers 0x00-0x06 with address 0x59: 08 00 00 00 00 00 10

    Thanks,

    Drew