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SN65LVDS104: fan out buffer 148.5MHz clock

Other Parts Discussed in Thread: SN65LVDS104

I have a couple of questions regarding the SN65LVDS104:

I want to use it as a fan out buffer for a 148.5MHz clock, but the clock source is a 1.8V CML device.
Can the input of the SN65LVDS104 accept this?
Do I need to AC couple the input or can it be DC coupled?

The clock source is a Silicon Labs Si591 device (+1.8V CML output) - do we have any alternate sources for this?

Thanks.

 

  • Hi Leslie,

    The LVDS104 should be compatible with your clock source.  If the Si591's output signal is DC-coupled and terminated with 50-Ohm pull-ups to +1.8 V, it should produce a .7- to 1.2-V differential signal at a common mode of +1.05 V.  These numbers come from the Si591 datasheet's CLK+/- Output Levels and Symmetry Table.  The LVDS104 requires input voltages on the bus pins between 0 and +2.5 V, and can detect differential signals of at least +/- 100 mV.  I see no problem with interfacing the two devices.

    If you decide you want to AC-couple, I have attached a TI app note that details how a CML source can be interfaced with an LVDS receiver such as the LVDS104.  Basically, it recommends that the CML signal is terminated to Vcc on the source side, then AC-coupled and re-biased to an LVDS common mode at the receiver.  Again, in this case AC-coupling is not a requirement.

    As far as alternate sources, I am not sure.  There are many available options when it comes to oscillators.  There may not be a direct replacement for the Si591, but looking around on a few vendor websites turned up a good amount of devices that could output a 148.5 MHz clock.  Also, the Si591 can be purchased as a 3.3-V LVDS output device, which may simplify the design.

    Please let me know if you have any additional questions.

     Best regards,

    Max

     

     

  • Sorry!  Forgot to attach the app note.

    - Max

    scaa059c.pdf