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TLK1201A serial interface coupling

My customer is asking for TI recommendations for the AC coupling caps on the Receive input termination (RXP/N), in particular the capacitor to ground at the junction of the 50 termination resistors (per Figure 11 of data sheet). The TSW2000 evaluation system shows these caps as 10 nF. The customer asks if we have a note or formula for computing the optimal value. Is the 10 nF the result of such a analysis, or selected based on general RF practices for low impedance at the operating frequencies.

  • Hello Mark,    

    The capacitor to ground at the junction of the 50 Ohm termination resistor filters out the common mode noise and its value depends upon the common mode noise (due to skew etc.) in the system. The main aim is to ensure low impedance over frequencies of interest.    

    The value of the ac-coupling capacitor is chosen to block dc. The capacitor value is chosen such that the lower cut off frequency of the RC filter is low enough to avoid voltage drift due to baseline wander*. The capacitor package size is also chosen to avoid impedance discontinuities. The package size may also limit the capacitor values.     

    An approximate method to ensure the workability of the circuit is given below: 

    For 8b/10b coding, Run length = 5

    Let’s say freq. of operation = 1 GHz, Thus, Time period = 1ns 

    Voltage Drop across capacitor = Current * Time period for 5 constant bits / Capacitor Value    

    Or, Voltage drop = (3.5mA) (5 ns) / 10nF = 1.75 mV which is a small percentage of the signal swing. We can go for a higher value of capacitor for a lesser voltage drop across the capacitor.    

    *If the pulse repetition frequency is low compared with the time constant of the input circuit, there is some "droop" in the waveform due to the discharging of the input capacitor.   

    Regards,  

    Ankur Verma  

    High Speed Interface Applications

  • Hello Mark,

    Above calculation is an approximation and was done for LVDS driver. To be precise, TLK1201 has an integrated VML driver and its output swing is 850mVp-p with Vcm = 1.25V (Rt = 50 Ohms) [1].

    Unlike LVDS driver, this does not have a current source to maintain 3.5mA driver output current (Used in the calculation above), thus we go for a different approach of finding the voltage drop/drift across the capacitor.

    Vdrift is given by (Vo/2)(1-exp(-2.pi.f.(r/B))), where: Vo is the peak-to-peak source voltage, f is the low-frequency cut-off of the high pass filter resulting from ac-coupling capacitor and termination resistor, r is the run length, and B is the bitrate [2].

    Now, to calculate Vdrift, f needs to be calculated as below: f = 1/(2*pi*R*C) and since Rt = 50 Ohms and C = 10nF and putting value of f in above equation for Vdrift calculation, we get:

    Vdrift = (0.85/2)(1-exp(-2.pi.f.(5/1e9))) ~ 4.23mV which is again a small percentage of the signal swing (850mVp-p) of VML driver.

    Further Clarifications

    1. By freq. of operation, I meant 1Gbps, so that is equivalent to bit period of 1ns.
    2. And to share more knowledge, the advantage of using the capacitor to ground at the junction of the 50 Ohm termination resistor is that if there is some transmission line skew, i.e., the differential signals do not arrive at the same time due to different line lengths or driver output slew, the capacitor acts as a small-signal short circuit.

    References

    1. Page 12 of TLK1201 datasheet
    2. Broadband Circuits for Optical Fiber Communication by Eduard Säckinger

    Regards,

    Ankur Verma

    High Speed Interface Applications