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SN65LVDS2 - Behavior with open inputs

Joachim Wuerker
Mastermind 23275 points
Other Parts Discussed in Thread: SN65LVDS2

My customer would like to know how the output (R) of SN65LVDS2 behaves when the inputs are open and the device is externally terminated with a 100Ohm resistor.
Is line 2 (Output = ?) of table 'Receiver' on page 2 in the datasheet valid or line 4 (Output = H)?

According to p. 13 the output should be HIGH due to the fail safe circuit.
However the table on p.2 is somehow confusing.

  • 0
    TI__Guru 62920 points

    Joachim,

    You are correct that the fail safe circuit will cause the LVDS2 output to go high when the inputs are open.  I think the confusion with the table on page 2 arises because it lists "Open" along with various Vid levels and their resulting outputs.  The "Open" condition, however, is not determined by the input voltage level, but rather by the input current.  This is alluded to on page 13:

    "Open circuit means that there is little or no input current to the receiver from the data line itself. This could be when the driver is in a high-impedance state or the cable is disconnected. When this occurs, the LVDS receiver pulls each line of the signal pair to near VCC through 300-kΩ resistors as shown in Figure 15. The fail-safe feature uses an AND gate with input voltage thresholds at about 2.3 V to detect this condition and force the output to a high level regardless of the differential input voltage."

    I hope this clears everything up.  Please let me know if you have any additional questions.

    Regards,

    Max Robertson