This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Cam Link Interface serializer and deserializer device required

Other Parts Discussed in Thread: SN75LVDS82, SN75LVDS83B, SN65LVDS301, SN75LVDS86A, SN75LVDS83C, DS90CR288A, FLINK3V8BT-85

 

Hi,

We are looking for serializer [Transmitter] and deserilizer [Receive] for Camera CamLink interface as shown in block dia. Below,

Serializer and deserialzer is interfacing to virtex-6 FPGA which is 2.5V compatible, please suggest us suitable part to suit our requirement.

 

Quick response is highly appreciated.

 

 

Thanks,

Sachin Nalbalwar

  • Hello,

    TI have a variety of serializers-deserializers that work with LVDS.

    You may want to check the SN74LVDS83B ---> SN75LVDS82

    http://www.ti.com/lit/ds/symlink/sn75lvds82.pdf

    http://www.ti.com/lit/ds/symlink/sn75lvds83b.pdf

    Also, you may find helpful the application notes located at the below link.

    http://www.ti.com/lit/an/slla300/slla300.pdf

    Regards.

  • Hi sachin, it will be helpful to know the parallel-IO voltage requirements on each end of the SerDes, and the pixel clock frequency.

    For 1.8V --> Ser --> Des --> 1.65-3.6V at 4-65MHz, TI's SubLVDS is a good low-cost low-power solution.  See SN65LVDS301.
    For 1.65-3.6V --> Ser --> Des --> 3.3V at 20-68MHz, see the SN75LVDS83C and SN75LVDS86A.

    Let me know if you have other needs.

    Thanks,
    RE

  • Hi,

    Thanks for quick response.

    As per the CamLink specs, page no.19  at URL below , FLatlink receiver and transmitter may not compatible with Camlink.

     

    Do you still recommend to use this chip for camlink application.

     

     

    http://www.lord-ing.com/web/IMG/pdf/Camera_Link.pdf

     

     Can i still use this chipset for Camlink interface?

     

    Thanks,

    Sachin Nalbalwar

  • Hi,

    Anything below 2.5V is good for parallel-IO interface since virtex-6 fpga can not tolarate more than 2.5v/3v and pixel frequency will be 85Mhz max. as per spec. but in my case actual parallel-IO throughput is going to be 120 Mbyte/sec, if i have convert it back to serial then pixel freq. requirment would be 40Mhz. let me know if my calculations are otherwise.

    I think both the devices you suggested should work for my application.

    my only As per camlink sepc. Flatlink device may not be compatible for CamLink application.

    Please clarify.

    Thanks,

    Sachin Nalbalwar

     

     

  • Sachin, thanks for clarifying.  Our devices aren't compatible with the CameraLink standard.  They can only be used as an LVDS SerDes with single-ended parallel on each end.  TI doesn't have any CameraLink transmitters or receivers.

    Thanks,
    RE

  • Hi,

    Thanks for the clarification.

    I found following devices with National semicondutor

    DS90CR287MTD transmitter and DS90CR288AMTD as receiver [3.3V compatible].

    Can i use above devices for CamLink application, if yes, are there any 2.5V version of such devices with national for interfacing with 2.5V compatible virtex-6 fpgas.

    BTW, I have been re-directed to ti support site at national website.

    Thanks,

    Sachin Nalbalwar

     

     

     

  •  

    Let me know if you need any more clrification in my query.

    We have to take decision on these parts soon, please suggest us correct part from National semi if it is not available with ti.

    Thanks,

    Sachin Nalbalwar

  • Hello -

    The National Channel Link parts are called out and referred to in the Camera Link standard and are commonly used in CameraLink applications. Other devices that are functional equalivalents can be used also.

    The DS90C287 and DS90CR288A support up to 85MHz PCLKs and are 3.3V devices and interface to 3.3V logic natively.  As for interfacing the LVCMOS side to 2.5V FPGA, the VOL/VOH and VIH and VIL specs need to be reviewed to make sure they are directly compatible.  Otherwise a level shifter could be used to adapt 2.5V to 3.3 and for the other direction.

    Channel Link (1), and FPD-Link and also the FlatLink parts are all similar in terms of the LVDS side being LVDS, and 7:1 muxing, and can inter-operate.  FlatLink3G is a different family and offers a lower power alternatives but is not campatible with Channel Link or the existing CameraLink standard.

    The National parts are now part of the TI family and are in full production and offered by TI now.

    John Goldie

    DPS APPS / SVA / www.ti.com

     

  • John, I wasn't aware that Camera Link is compatible with typical LVDS SerDes.  Sachin's block diagram shows 4 channels.  Are there skew requirements between any of them?  I'm guessing there's not a strict skew requirement, if 4 1-channel devices may be used.

    Thanks,
    RE

  • Hi Ross -

    This is a somewhat tricky question, but in general the answer is yes.  Camera Link (the original) standard specified a 28 bit LVDS link based on Channel Link (1) Ser/Des from National.  So this is a LVDS PHY, uses the 7:1 mux, and provides 4 data and a clock for the high speed side.  Therefore the Channel Link (1), FPD-Link (1), LDI, and FlatLink familes all provide this type of interface.  This is also why the FlatLink3G is not an option due to its use of subLVDS and different serial scheme.  The applications tend to use on the parallel side the Rising Edge clock, but that is an internal system issue and a falling edge could also be used.  I think the text cited above about interoperation concern was from the early days when chipset interoperation was more limited due to jitter, and PLL concerns which have to the most part been worked out.

    The standard uses a nice 3M MDR low skew cable and connector system.  You are also correct, the RSKM budget (skew) needs to be met for error free data recovery.

    The tricky part is there are some next generation proposals for Camera Link, and also regional implementations in the works that use alternate approaches and are not compatible with the first generation.  The above is in regards to gen 1 which is the defacto standard and widely employed to date.

    John Goldie

    DPS APPS / SVA / www.ti.com

     

  • I was referring to the fact that there are 3 transmitters from the camera side.  If 3 LVDS_TX devices are used, channel-to-channel skew will be introduced.  The channel-to-channel skew involved with 2 LVDS_TX 1ch devices to drive a 2ch panel is usually unacceptable, as I know LG panels require no more than 1 bit period of channel-to-channel skew while our device propagation could vary by about 3 bit periods.  Since you recommended 1ch devices for this Camera Link, it seems there's not such a strict channel-to-channel skew requirement.

    Best regards,
    RE

  • Hi -

    Like all good standards, this one has many options, there are BASE, MEDIUM and FULL configurations which can use one chipset, two or three.  Each chipset carries its own clock and control (LVAL, FVAL, DVAL, SP).  In additionl up to four parallel LVDS lines are specified.  Realigning data between chipsets is not done inthe SER/DES when doing the FULL configuration, but deeper in the system.  I am not sure, but I believe the control signals are used to align up frames if needed.

    Best Regards;
    John

  • Hi Sachin Nalbalwar.

    I have the same problem. I was advised to use FLINK3V8BT-85. It's good to implement the camera link?

    How did you solve the problem?

  • Greetings -

    The board is advertised and sold as a evaluation board of the ser/des device.  The FPD-Link and Channel link ser/des are used in a wide variety of applications ranging from data to video.  It is not sold as a Camera Link board. If you want to get it close to that, one would need to take the existing FLIBNK3V8BT-85 board and make modifications to set up the correct data mapping, swap to Channel Link parts, and adapt to the correct connectors also.  There might be a 3rd party Camera Link board available also. We do not offer one per say. 

    Best Wishes

    John Goldie