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SN65DSI84-Q1: 0xe5 fault status register bit6 is 1, and CRC fault is always reported.

Alan Xia
Genius 9680 points
Part Number: SN65DSI84-Q1

Tool/software:

Hi team，

Tier 1：Neusoft

OEM: Geely

During a cold restart of the host, the DSI84 displays normal graphics, and the 0xe5 fault status register is normal.
When the STR is released, the DSI84 image displays normally, but bit 6 of the 0xe5 fault status register is 1, and a CRC error is reported. (I have executed Write 0xFF to CSR 0xE5 to clear the error registers, but it does not clear the error.)

Please provide feedback tomorrow morning on the following issues:
1. If bit 6 is reported as an error, what impact will it have on the graphics?
2. Please provide some troubleshooting advice.

The attached pictures are the DSI84 initialization waveforms during cold start and STR escape. The timing is designed according to the following requirements;

Cold start (blue reset, pink dsi data, yellow I2C)

STR escape (blue reset, pink dsi data, yellow I2C)    （STR (Suspend to RAM) is a low power mode）

Blue EN, green DSI DATA, pink DSI CLK1 --- cold start

  • 0
    TI__Mastermind 23260 points

    Hi Alan,

    Currently with the CRC error reported, the display graphics is still working. Is this correct?

    Are the customer checking that the DSI clock and data lanes are following the datasheet sequence? The DSI clock lane should be in HS state and data lanes in LP11 state initially after power on (Init seq 2).

    Since this is showing a CRC error is there any issue with the DSI connection, layout, cable that could be causing an SI issue?

    Best regards,
    Ikram

  • 0 in reply to Ikram Haque
    TI__Genius 9680 points

    Hi Ikram,

    I've discussed this with Ted, and the root cause of this issue is on the MTK side, not the 184.

    Also, I have another question I'd like to confirm: is there a way to turn the LVDS video signal on/off on the DSI84 (other than restarting the chip)?

    During the screen power-on/off sequence, there are requirements for turning the LVDS video signal on/off.

  • 0 in reply to Alan Xia
    TI__Mastermind 23260 points

    Hi Alan,

    If that issue was due to SoC, then maybe this could have a similar solution. Did Ted suggest a solution?

    SN65DSI84: LVDS output enable disable
     

    According to the E21E thread above, the only way to disable video output is using the EN pin and re-initializing, or using the sequence in datasheet: "9.1.1 Video Stop and Restart Sequence"


    Best regards,
    Ikram