Note -- Our custom board enumerates and works fine in standard PCs.

It's not a new design -- a very old design and because of the pandemic, we have a ton in stock.  Just trying to get it working with a Raspberry Pi.

Did  ASPM L0s or L1 enabled in  Raspberry system? 

Enabling ASPM L0s or L1 on the switch may cause the switch to malfunction.

Regards

Brian

Hi Brian,

ASPM is disabled on the kernel command line with pcie_aspm=off.  I've also tried forcing gen1 speed, setting the tperst_clk_ms to 1000, etc.  The kernel log only says that the link is down. 

Something is happening because the devices behind the PCIe switch do come out of reset.

Neither the bridge nor the devices behind the bridge show up when doing an lspci.

I will do more research  if CM4/CM5 can support  PCIe bridge.

Regards

Brian

I'm also struggling with the same symptoms. May I know how it's going?

Hello,

Brian is looking into this, and will let you know once he has more information.

Thanks,

Ryan

A datapoint, I purchased one of these:

https://www.amazon.com/GeeekPi-HAT-Raspberry-B12-Interface/dp/B0D5CRSC64?th=1

which has an ASM1184 PCIe bridge and it works.  Devices behind this device enumerate and work.

Thanks,

-don

 ASM1184 can support PCI express base SPEC 2.0, but XIo3130 only can support  PCI express base SPEC 1.1.

Maybe this is the main difference.

Best

brian