• State TI Thinks Resolved
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 33 subscribers
  • Views 81 views
  • Users 0 members are here
Support feedback
Options
Options
Related

TCAN11625-Q1: TS Pin

Xiaowei Zhang
Expert 3605 points
Part Number: TCAN11625-Q1

Tool/software:

Hi team,

My customer Joyson are using TCAN11625DMTRQ1 for their project. They met an issue that TS pin will not goes high when use low rising slew rate Vsup. Can you please help analysis the cause? Thanks.

SCH: 8780.CAN.pdf

Low slew rate Vsup:

High slew rate Vsup

Best Regards,

Xiaowei Zhang

  • 0
    TI__Expert 3605 points

    Hi team,

    After check with customer, the issue may caused by that if MCU don't detect TS high within 4ms after push the nSLP pin high, customer will manual pull low the nSLP pin low.

    So they asked what's the minimum interval to detect TS high after push the nSLP pin high?

     

    Best Regards,

    Xiaowei Zhang

  • 0
    TI__Genius 9616 points

    Hi Xiaowei,

    Thanks for reaching out. This is most likely because VIO is ramping up slower than expected and/or nRST is not being held high long enough. The timing specs at play here are t_POWER_UP (hold VSUP above 4.42V), t_UVIO (hold VIO above 1.65V), and t_nRST_cold (hold nRST high during a cold crank event). VSUP will need to be held above 4.42V for 4ms, VIO will need to be held above 1.65V for 12us, and nRST will need to be held high for 27ms. That gives you 31.012ms plus however long it takes for your VSUP and VIO supply rails to reach their minimum threshold values until you can start driving nSLP high. You can see how this happens in the second screenshot when VSUP and nSLP are held high for longer. 

    Can you share the same waveforms with VIO and nRST included?  

    Also, you can remove the pullup resistor for the TS pin. It is a push-pull output, so a pullup is not needed. 

    Regards,

    Matt 

  • 0 in reply to Matt Smith
    TI__Expert 3605 points

    Hi Matt,

    Thanks for your reply.

    Customer asked how long will TS pin assert after nSLP is pull high？

    Best Regards,

    Xiaowei Zhang

  • 0 in reply to Xiaowei Zhang
    TI__Genius 9616 points

    Hi Xiaowei, 

    TS will only go high if the device is in normal mode. nSLP is not the only bottleneck here.  As mentioned above, VSUP, VIO, and nRST need to power up first before the device reads the voltage on nSLP. Since I don't know how fast VIO and nRST are ramping in your customer's system, I can't make an accurate statement on total wait time until TS is driven high. 

    Once you know the VIO and nRST rise times, you can calculate the total time before TS is driven high by adding the following times together: 

    • VSUP rise time to 4.42V: ~91ms (from 1st screenshot)
    • t_POWERUP: 4ms
    • VIO rise time to 1.65V: unknown
    • t_UVIO: 12us
    • nRST rise time to VIH: unknown
    • t_nRST_cold: 27ms
    • t_nSLP_fltr: 7.5us 
    • t_CAN_active: 2us

    Adding all of these values together will give you the maximum amount of time it will take TS to go high, assuming all other recommended operating conditions are met. 

    Regards,

    Matt