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DP83867IR: About new revision detail

teritama
Expert 2185 points
Part Number: DP83867IR

Tool/software:

Hi Team,

I have several questions regarding the revisions of the DP83867 IC as described in the datasheet Rev.I:

  1. From Rev.H, gain control registers at device addresses 0xA0 to 0xA3 have been added (datasheet Rev.I, page 90). Does this mean the gain values have changed compared to previous revisions? Or are these registers newly added while the default gain remains unchanged?

  2. From Rev.F, the Viterbi Module Configuration (VTM_CFG) at address 0x0053 has been introduced (datasheet Rev.I, page 86). If used with default settings, does this result in any behavioral changes compared to previous revisions?

  3. From Rev.F, the pin types of TX_EN and TX_CTRL have changed from Output to Input. Can you confirm that this is a correction of a documentation error and not a specification change?

  4. From Rev.H, the default values of RGMII_TX_CLK_DELAY and RGMII_RX_CLK_DELAY in the RGMII Control Register (RGMIICTL, address 0x0032, datasheet Rev.I, page 83) have changed from 0 to 1. Is this also a documentation correction rather than a specification change?

  5. When enabling RGMII and AMDIX via strap configuration, is it acceptable to leave RX_D6 strap open for both Rh and Rl? I have reviewed the DP83867 Schematic Checklist (www.ti.com/.../slvrbn1), but would appreciate your confirmation.

Thank you for your support.

Best regards,

teritama

  • +1
    TI__Genius 14046 points

    Hi Teritama, 


    teritama said:
    From Rev.H, gain control registers at device addresses 0xA0 to 0xA3 have been added (datasheet Rev.I, page 90). Does this mean the gain values have changed compared to previous revisions? Or are these registers newly added while the default gain remains unchanged?

    There is no change in the gain value. This register was just unreserved for customer uses. However, please note that the default values on these registers are determined by trim. 

    teritama said:
    From Rev.F, the Viterbi Module Configuration (VTM_CFG) at address 0x0053 has been introduced (datasheet Rev.I, page 86). If used with default settings, does this result in any behavioral changes compared to previous revisions?

    There will be no behavioral changes compared to the previous revisions. 

    teritama said:
    From Rev.F, the pin types of TX_EN and TX_CTRL have changed from Output to Input. Can you confirm that this is a correction of a documentation error and not a specification change?

    This is a correction of error. 


    teritama said:
    From Rev.H, the default values of RGMII_TX_CLK_DELAY and RGMII_RX_CLK_DELAY in the RGMII Control Register (RGMIICTL, address 0x0032, datasheet Rev.I, page 83) have changed from 0 to 1. Is this also a documentation correction rather than a specification change?

    This is a correction of error. 

    teritama said:
    hen enabling RGMII and AMDIX via strap configuration, is it acceptable to leave RX_D6 strap open for both Rh and Rl? I have reviewed the DP83867 Schematic Checklist (www.ti.com/.../slvrbn1), but would appreciate your confirmation.

    It is acceptable to leave the strap open for default mode (mode 1). 

    Best,
    J