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TUSB1310_interface logic_SI simulations

Ramesh Ponnada
Prodigy 10 points

Other Parts Discussed in Thread: TUSB1310

Hi ,

We have USB 3.0 interface in our design..The interface is from Virtex6 to TUSB1310 to USB connector..I would like to know , which interface logic is used ? ..( LVCMOS18 or LVTTL18 or SSTL18)

Thanks & Regards,

     Ramesh.P

  • 0
    TI__Genius 16860 points

    The PIPE3 and ULPI interfaces on the TUSB1310 are 1.8V LVCMOS.

    Other suggestions on these interfaces:
    • PIPE3 Connection
    • The source synchronous signals for each direction of the interface for critical TX and RX signals, should be matched in length to within 250 mils
    • Other signals can be of different lengths but should be as short as possible.
    • External source series termination resistors are not required if the interface is kept to less than two inches in length with an impedance of 50 Ohms ±10%.
    • Routing this interface longer than two inches or through a connector is not recommended.
    • ULPI Connection
    • should be as short as possible and matched in length
    • Single ended impedance of 50 Ohms ±10%