This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TCA9406: Rise/Fall time

Part Number: TCA9406
Other Parts Discussed in Thread: TXS0102, PCA9306, TCA9803, TCA39306, TCA9617B

Tool/software:

Hi,

I would like to use TCA9406 with I2C Fast Mode. I2C Rise/Fall time has a lower limit, and rapid changes are not allowed.

1. I am currently adjusting it with an external pull up resistor, but the waveform does not become gentle. Could you tell me how to make the waveform gentle with an external component?

2. Also, is it correct to understand that this IC supports I2C Fast Mode?

Best Regards,

Nishie

  • The TCA9406 is essentially identical with the TXS0102, which was designed for high-speed signals.

    In most cases, the TCA9406 will work with other devices. If you want to ensure that the rise times of the I²C specifications are met, use other translators like the PCA9306 or TCA9803.

  • Hello Nishie,

    Our apps team is current out today celebrating Labor Day (US Holiday). Allows us two days to respond back. Thank you for your understanding.

    Regards,

    Josh 

  • Hi Clemens-san,

    If you suggested another IC, is it correct to understand that it is difficult to adjust the signal transition time using TCA9406 and external components?

    Best Regards,

    Nishie

  • Hi Josh-san,

    I look forward to your reply after the holiday. I would appreciate it if you could confirm my questions 1 and 2.

    Best Regards,

    Nishie

  • It might be possible to adjust the transition times by adding a series resistor or even an LPF filter. You'd have to experiment on your actual board.

  • Hi Nishie,

    1. I am currently adjusting it with an external pull up resistor, but the waveform does not become gentle. Could you tell me how to make the waveform gentle with an external component?

    The TCA9406 has built in one-shot accelerators and 10k PU resistors on both sides of the device. The equivalent PU resistance is 5kohm, adding any external PU resistance only makes this PU resistance value lower (stronger PU to VCC). 

    The one-shot accelerators trigger on a rising edge. Once a certain voltage threshold is met, the one-shot triggers which acts like a very strong PU to VCC. You won't be able to adjust the PU strength much by varying the external PU resistance. This is why CLemens has suggested trying a different device that is more passive such as PCA9306 which does not have internal 10k PU resistors, or one-shot accelerators. 

    2. Also, is it correct to understand that this IC supports I2C Fast Mode?

    The TCA9406 should support I2C fast mode. 

    Regards,

    Tyler

  • Hi Tyler-san,

    Thank you for your support.

    The TCA9406 should support I2C fast mode. 

    I received an answer that the TCA9406 should support I2C Fast Mode, but I thought it would be difficult to support Fast Mode when I saw the answer about the measures for external circuits. Does it actually support Fast Mode?

    Best Regards,

    Nishie

  • Nishie,

    This device is rated up to 1 MHz for fast mode+. 

    This would include fast mode up to 400 kHz. 

    I was referencing external PU resistors. Due to the design of this device, it may not be necessary to add any external PU resistors since they are included within the device. 

    Adding external PU resistors would only be necessary if there is significant cap loading on the I2C bus from accumulated trace capacitance and input capacitance from external target and controller devices. 

    Regards,

    Tyler

  • Hi Tyler-san,

    When I told the customer the information I received, he had already taken the following measures.

    ・With/without external pull-up resistor
    ・Damping resistor added
    ・Capacitor added between GND

    However, the condition of "lower limit of rise/fall" described in the I2C standard (UM10204) is not satisfied.

    I have attached the actual measured waveform. Is there any possible cause?

    Best Regards,

    Nishie

  • Hi Nishie,

    I understand the question. 

    Minimum spec of I2C for rise/fall time is put in place mostly for overshoots/undershoot management. 

    As long as the setup and hold times for each bit cycle are followed appropriately, I don't see a problem with such as fast rise-time, especially since I don't see any overshoots in the above waveform (RTA is designed to release just before reach VCC). 

    You could make the argument that this device is outside minimum rise-time / fall-time specifications by measuring from 30% to 70% of the waveform, although i don't see that this device would impact I2C communication negatively or cause any damage since no significant overshoot/undershoot exists. 

    If the customer wants a device without RTA, consider using TCA39306 for passive level translation or a buffer such as TCA9617B. 

    Regards,

    Tyler

  • Hi Tyler-san,

    Regarding the specifications described in the I2C standard (UM10204), I found the following on the HP of a manufacturer that handles I2C products.

    From this content, I thought that products that support I2C Fast Mode need to comply with the specification.

    I would like to know how TCA9406 can comply with the specification of I2C Fast Mode.

    <HP Contents>

    The lower limit is defined not only to manage electromagnetic susceptibility and undershoot, but also to ensure robust signal integrity and interoperability across I²C-compliant devices. 

    Here are the key reasons for this specification:

    - Signal Integrity: Excessively fast transitions can cause reflections, ringing, and timing violations, especially in systems with longer traces or higher capacitance. The lower limit helps maintain stable communication.

    - EMS and Undershoot: Fast edges increase high-frequency emissions and can lead to undershoot due to inductive effects. The timing limits help mitigate these risks.

    - Device Compatibility: The I²C bus is designed for multi-device, multi-vendor environments. Adhering to timing specifications ensures reliable operation across all compliant devices.

    While it may be technically feasible to operate outside the lower limit in controlled environments where EMS and undershoot are not concerns, doing so would mean deviating from the I²C standard.

    This could compromise compatibility and long-term reliability.

    In summary, even if EMS and undershoot are not immediate issues, I recommend adhering to the specified timing limits to maintain compliance and ensure consistent performance.

    Best Regards,

    Nishie

  • Hi Nishie,

    I checked the I2C standard again and noticed for fast-mode plus, there is no minimum rise-time spec. 

    Regards,

    Tyler

  • Hi Tyler-san,

    Thank you for your support.

    I would like to know about Fast Mode, not Fast Mode Plus.

    Fast Mode has a lower limit for rise time and fall time, so I would appreciate if you could comment on this.

    Best Regards,

    Nishie

  • Hi Nishie,

    I don't have a definite answer to why NXP I2C standard does not have a minimum fall time for fast mode+  but it has a 20 ns limit for fast mode. 

    TCA9406 is meant to be compatible to the I2C spec. Compliant vs. compatible could mean different things. Compliant should follow the spec very closely. Compatible would mean with most applications, this device works with I2C. 

    From the datasheet: 

    "Under normal I 2C and SMBus operation or other open-drain configurations, the TCA9406 can support up to 2 Mbps; therefore, it is compatible with standard I 2C speeds where the frequency of SCL is 100 kHz (Standard-mode), 400 kHz (Fast-mode), or 1 MHz (Fast-mode Plus). The device can also be used as a general purpose level translator, and when the A- and B-side ports are both driven with push-pull devices the TCA9406 can support up to 24 Mbps"

    Regards,

    Tyler