TCAN4550: The application issues of chips

Jimmy Huang

Part Number: TCAN4550

Tool/software:

When I was testing can communication here, I soon found that after sending a command to the slave device, there was no data return from the slave device. At this point, I checked the interrupt nINT pin of tcan4550 and found that it was always at a low level. The chip should be abnormal.

The can command was sent 10 times. From the 0th to the 9th time, the slave device could reply with the data. After the 10th time, the slave device no longer replied with the can data.

I'm extremely anxious. Please help me figure out what the problem is and how to solve it

1 month ago

0 Jonathan Nerger 1 month ago

TI__Mastermind 33440 points

Hi Jimmy,

It sounds like you are getting a uncorrected ECC error that is causing the device to re-enter initialization mode (setting the INIT bit of the Control register 0x1018[0] = 1) and stops CAN communication resulting in your CAN Silent error which is then causing the CAN Error and Global Error bits to be set.

The MRAM cells are not automatically initialized to "0" at power up or following a reset, but the ECC calculations assume all unused bits have a value of "0." If you are not initializing the buffer cells to zero as part of your configuration sequence, then you will need to make sure to write zeros to any unused bytes in the MRAM elements such as the TX buffers to prevent possible ECC errors.

Regards,

Jonathan

0 Jimmy Huang 1 month ago in reply to Jonathan Nerger

Genius 3535 points

After reading your reply, it seems that tcan4550 has not re-entered the Initialization mode. There are the following two reasons:

When initializing the chip, there is a write 0 operation for the entire MRAM as follows:

void m_can_init_ram(struct m_can_classdev *cdev)
{
int end, i, start;

/* initialize the entire Message RAM in use to avoid possible
* ECC/parity checksum errors when reading an uninitialized buffer
*/
start = cdev->mcfg[MRAM_SIDF].off;
end = cdev->mcfg[MRAM_TXB].off +
cdev->mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE;

for (i = start; i < end; i += 4)
m_can_fifo_write_no_off(cdev, i, 0x0);
}

2..When an exception occurs, the value of register 0x1018 is 0, and bit0 is not set to 1, as follows:

1018: 00000000
1019: 00000000
101a: 00000000
101b: 00000000
101c: 00004409

1464.regdump.txt

Could you please check it? The above is the register dump

TCAN4550-SCH.pdf

Please also check if this schematic diagram is correct. If any modifications are needed, please explain it in detail

0 Jonathan Nerger 1 month ago in reply to Jimmy Huang

TI__Mastermind 33440 points

Hi Jimmy,

OK. I will review your register log and schematic for a possible reason for the ECC error and a halt to CAN communication.

Have you tried clearing all of the interrupt registers and see if it resumes CAN communication?

Is this error repeatable and always occurs on the 10th frame?

Do you have more than one board or TCAN4550 device and if so have you tried the test on multiple units to see if the issue may be specific to the device which means it may have a defect, or whether it occurs on all your devices which means it may be due to a register configuration issue?

Regards,

Jonathan

0 wang Ranen 1 month ago

Intellectual 320 points

this error is repeatable，but no always occurs on the 10th frame,it is random.
We have encountered this issue on multiple devices during testing.

0 Jonathan Nerger 1 month ago in reply to wang Ranen

TI__Mastermind 33440 points

Hello Jimmy and Wang,

I'm not sure what value you are using for TXB_ELEMENT_SIZE, but if it is not 18 then you may not be completely initializing all of the allocated MRAM to zero based on my understanding of your initialization sequence. A TX Buffer Element has 2 header words (8 bytes) + the number of bytes allocated from the TX Buffer Data Field Size register (TBDS in register 0x10C8[2:0]). Currently you have a 64 byte data field which is 16 words.

If you are by chance using 16 or 18 for the TXB_ELEMENT_SIZE to verify if you are possibly not initializing all of the TX Buffer/FIFO memory.

From your configuration, it appears you are using about 97% of your MRAM and you only have 16 words of unused MRAM that is not being initialized. I would recommend to initialize all MRAM (0x8000 to 0x87FF) to ensure there is no chance of accessing memory that has not been initialized to zero and take away that possible reason for an ECC error.

From your datalog, I see that MRAM cells 0x87C0 to 0x87FF are random values that have not been initialized. Please try to initialize these bytes and see if this resolves your ECC errors.

From the schematic, it overall looked OK. I don't know what the crystal's load capacitance requirements are, but 22pF caps for OSC1 and OSC2 are about twice the value I normally see for 40MHz crystals. Because the crystal is directly used by the MCAN controller and the Digital Core, any disruptions to this clock can also cause SPI and CAN communication errors. In general if the crystal circuit is not optimized, it may fail to start oscillating, stop oscillating, or have disruptions by switching between single-ended clock mode and crystal mode if the oscillation voltage drops below 150mV on OSC2.

Please also review the TCAN455x Clock Optimization and Design Guidelines Application Report (Link) for more information.

Regards,

Jonathan

0 wang Ranen 27 days ago in reply to Jonathan Nerger

Intellectual 320 points

The entire 2K space of MRAM has been initialized to 0, but errors still occur. Attached is a register dump, please help to take a look again. Thank you!

The MRAM configuration is as follows:

bosch,mram-cfg = <0x0 0 0 22 0 0 5 5>;

The code for initializing MRAM to 0 is as follows:

void m_can_init_ram(struct m_can_classdev *cdev)
{
int end, i, start;

/* initialize the entire Message RAM in use to avoid possible
* ECC/parity checksum errors when reading an uninitialized buffer
*/
start = cdev->mcfg[MRAM_SIDF].off;
end = cdev->mcfg[MRAM_TXB].off +
cdev->mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE;

start = 0;
end = 2048;
printk("yjc %s mram clear start:0x%x,end:0x%x \n",__func__,start,end);

for (i = start; i < end; i += 4)
m_can_fifo_write_no_off(cdev, i, 0x0);
}

0 wang Ranen 27 days ago in reply to wang Ranen

Intellectual 320 points

1(6).txt

0 Jonathan Nerger 26 days ago in reply to wang Ranen

TI__Mastermind 33440 points

Hello Wang,

The log file doesn't show there are any ECC errors.

The CEL field of the Error Counter Register shows there are protocol errors being generated (0x1040[23:16] = 24). The REC field is also >0 (0x1040[14:8] = 2).

The MCAN Interrupt register (0x1050) has the following bits set:

[29] ARA - This is likely due to your error log creation because you are not limiting your reads to proper register address and are doing a read for every byte instead of every word. You are also reading from register addresses that are either reserved or do not exist.

[27] PEA - There are protocol errors in the arbitration phase detected which is also what is causing the CEL counter to increase. I would suggest verifying the nominal and data bit timing configuration to make sure that it exactly matches the bit timing configuration of your other CAN nodes in your test setup. Any difference in bit timing configuration can lead to sampling errors and cause this type of error.

[12] TEFN - You have a TX Event FIFO entry from a successfully transmitted message

[11] TFE - The TX FIFO is empty and there are no messages to transmit.

[0] RF0N - The RX FIFO 0 has a new message from a successfully received message

The Interrupt register (0x0820) only indicates a CAN Silent error meaning that there has not been a state change between a dominant and recessive bus level within the approximate 1 second timer.

I can't really detect any configuration issues from this configuration. The device is transmitting and receiving messages although some protocol errors are detected but not enough to cause the device to enter a bus off condition. There are no messages loaded into the TX FIFO so if you are expecting the device to transmit a message, then you may need to determine why the TX FIFO is empty which may be the result of an error in your application firmware.

If the bit timing configuration settings are the same for all your other CAN bus nodes, then you may need to evaluate the clock frequency of your crystal to make sure it is within the required tolerance. The crystal's oscillation frequency changes with capacitance, so if the capacitance is too large your frequency will reduce resulting in time quanta that are larger than expected which may lead to bit times being longer than expected which may cause sampling errors with other devices operating on more nominal clock frequencies. I previously mentioned that your 22pF caps seem larger than I usually see, so you should verify the CAN bits have the expected bit periods with a scope and also you may need to try your tests with different cap values if your caps are too large.

Regards,

Jonathan

0 wang Ranen 20 days ago in reply to Jonathan Nerger

Intellectual 320 points

1.May I ask what happened to this error? How to solve it?

<4>[ 2.717032] .(3)[1:swapper/0]yjc m_can_dev_setup m_can_version=32,is_peripheral=1
<4>[ 2.719212] .(3)[1:swapper/0]tcan4x5x spi3.0 (unnamed net_device) (uninitialized): Failed to init module
<4>[ 2.720451] .(3)[1:swapper/0]yjc tcan4x5x_init

The source code is as follows:

void m_can_config_endisable(struct m_can_classdev *cdev, bool enable)
{
u32 cccr = m_can_read(cdev, M_CAN_CCCR);
u32 timeout = 10;
u32 val = 0;

/* Clear the Clock stop request if it was set */
if (cccr & CCCR_CSR)
cccr &= ~CCCR_CSR;

if (enable) {
/* enable m_can configuration */
m_can_write(cdev, M_CAN_CCCR, cccr | CCCR_INIT);
udelay(5);
/* CCCR.CCE can only be set/reset while CCCR.INIT = '1' */
m_can_write(cdev, M_CAN_CCCR, cccr | CCCR_INIT | CCCR_CCE);
} else {
m_can_write(cdev, M_CAN_CCCR, cccr & ~(CCCR_INIT | CCCR_CCE));
}

/* there's a delay for module initialization */
if (enable)
val = CCCR_INIT | CCCR_CCE;

while ((m_can_read(cdev, M_CAN_CCCR) & (CCCR_INIT | CCCR_CCE)) != val) {
if (timeout == 0) {
netdev_warn(cdev->net, "Failed to init module\n");
return;
}
timeout--;
udelay(1);
}
}

2.The current issue is very urgent and there has been no progress. May I ask if it is possible to send the equipment to your site for analysis?

0 Jonathan Nerger 19 days ago in reply to wang Ranen

TI__Mastermind 33440 points

Can you first read the MODE_SEL field of the Modes of Operation and Pin Configuration register (0x0800[7:6]) to verify the device is in Normal mode an is NOT in Standby Mode?

If the device is in Standby Mode, then the INIT bit in the CCCR register (0x1018[0]) will be set to '1' and your initialization will fail.

Regards,

Jonathan

0 wang Ranen 19 days ago in reply to Jonathan Nerger

Intellectual 320 points

1(4).txt 0753.regdump.txt

Fullscreen 1(7).txt Download

0000: 4e414354
0004: 30353534
0008: 00110201
000c: 00000008
0010: 3f3f0000
0800: c80004a8
0804: 00000002
0808: 00000000
080c: 00000000
0810: 00000000
0814: 00000000
0818: 00000000
081c: 00000000
0820: 000004a2
0824: 28001801
0828: 00000000
082c: 00000000
0830: 8096a8ff
1000: 32150320
1004: 87654321
1008: 00000000
100c: 00000a33
1010: 00000080
1014: 00000000
1018: 00000000
101c: 00004409
1020: 00000000
1024: 00000000
1028: ffff0000
102c: 0000ffff
1030: 00000000
1034: 00000000
1038: 00000000
103c: 00000000
1040: 00000000
1044: 0000070f
1048: 00000000
104c: 00000000
1050: 28001801
1054: 27ffffff
1058: 00000000
105c: 00000001
1060: 00000000
1064: 00000000
1068: 00000000
106c: 00000000
1070: 00000000
1074: 00000000
1078: 00000000
107c: 00000000
1080: 00000000
1084: 00000000
1088: 00000000
108c: 00000000
1090: 1fffffff
1094: 00000000
1098: 00000000
109c: 00000000
10a0: 00160000
10a4: 000c0705
10a8: 00000006
10ac: 00000000
10b0: 00000630
10b4: 00000000
10b8: 00000000
10bc: 00000777
10c0: 05000658
10c4: 00040405
10c8: 00000007
10cc: 00000000
10d0: 00000000
10d4: 00000000
10d8: 0000001f
10dc: 00000000
10e0: 00000000
10e4: 00000000
10e8: 00000000
10ec: 00000000
10f0: 00050630
10f4: 00040301
10f8: 00000002
10fc: 00000000
8000: 1fa3cfd0
8004: ff080000
8008: 870c4104
800c: 00000078
8010: 00000000
8014: 00000000
8018: 00000000
801c: 00000000
8020: 00000000
8024: 00000000
8028: 00000000
802c: 00000000
8030: 00000000
8034: 00000000
8038: 00000000
803c: 00000000
8040: 00000000
8044: 00000000
8048: 1fa60fd2
804c: ff080000
8050: 870c4104
8054: 00000078
8058: 00000000
805c: 00000000
8060: 00000000
8064: 00000000
8068: 00000000
806c: 00000000
8070: 00000000
8074: 00000000
8078: 00000000
807c: 00000000
8080: 00000000
8084: 00000000
8088: 00000000
808c: 00000000
8090: 1fa20fd0
8094: ff080000
8098: fa0d4103
809c: 00000000
80a0: 00000000
80a4: 00000000
80a8: 00000000
80ac: 00000000
80b0: 00000000
80b4: 00000000
80b8: 00000000
80bc: 00000000
80c0: 00000000
80c4: 00000000
80c8: 00000000
80cc: 00000000
80d0: 00000000
80d4: 00000000
80d8: 1fa60fd2
80dc: ff080000
80e0: fa0d4103
80e4: 00000000
80e8: 00000000
80ec: 00000000
80f0: 00000000
80f4: 00000000
80f8: 00000000
80fc: 00000000
8100: 00000000
8104: 00000000
8108: 00000000
810c: 00000000
8110: 00000000
8114: 00000000
8118: 00000000
811c: 00000000
8120: 1faa4fd4
8124: ff080000
8128: fa0d4103
812c: 00000000
8130: 00000000
8134: 00000000
8138: 00000000
813c: 00000000
8140: 00000000
8144: 00000000
8148: 00000000
814c: 00000000
8150: 00000000
8154: 00000000
8158: 00000000
815c: 00000000
8160: 00000000
8164: 00000000
8168: 1fa3cfd0
816c: ff080000
8170: 870c4104
8174: 00000088
8178: 00000000
817c: 00000000
8180: 00000000
8184: 00000000
8188: 00000000
818c: 00000000
8190: 00000000
8194: 00000000
8198: 00000000
819c: 00000000
81a0: 00000000
81a4: 00000000
81a8: 00000000
81ac: 00000000
81b0: 1fa60fd2
81b4: ff080000
81b8: 870c4104
81bc: 00000088
81c0: 00000000
81c4: 00000000
81c8: 00000000
81cc: 00000000
81d0: 00000000
81d4: 00000000
81d8: 00000000
81dc: 00000000
81e0: 00000000
81e4: 00000000
81e8: 00000000
81ec: 00000000
81f0: 00000000
81f4: 00000000
81f8: 1fa3cfd0
81fc: ff080000
8200: fa0d4103
8204: 00000000
8208: 00000000
820c: 00000000
8210: 00000000
8214: 00000000
8218: 00000000
821c: 00000000
8220: 00000000
8224: 00000000
8228: 00000000
822c: 00000000
8230: 00000000
8234: 00000000
8238: 00000000
823c: 00000000
8240: 1fa64fd2
8244: ff080000
8248: fa0d4103
824c: 00000000
8250: 00000000
8254: 00000000
8258: 00000000
825c: 00000000
8260: 00000000
8264: 00000000
8268: 00000000
826c: 00000000
8270: 00000000
8274: 00000000
8278: 00000000
827c: 00000000
8280: 00000000
8284: 00000000
8288: 1faa4fd4
828c: ff080000
8290: fa0d4103
8294: 00000000
8298: 00000000
829c: 00000000
82a0: 00000000
82a4: 00000000
82a8: 00000000
82ac: 00000000
82b0: 00000000
82b4: 00000000
82b8: 00000000
82bc: 00000000
82c0: 00000000
82c4: 00000000
82c8: 00000000
82cc: 00000000
82d0: 1fa3cfd0
82d4: ff080000
82d8: 870c4104
82dc: 00000088
82e0: 00000000
82e4: 00000000
82e8: 00000000
82ec: 00000000
82f0: 00000000
82f4: 00000000
82f8: 00000000
82fc: 00000000
8300: 00000000
8304: 00000000
8308: 00000000
830c: 00000000
8310: 00000000
8314: 00000000
8318: 1fa60fd2
831c: ff080000
8320: 870c4104
8324: 00000088
8328: 00000000
832c: 00000000
8330: 00000000
8334: 00000000
8338: 00000000
833c: 00000000
8340: 00000000
8344: 00000000
8348: 00000000
834c: 00000000
8350: 00000000
8354: 00000000
8358: 00000000
835c: 00000000
8360: 1fa20fd0
8364: ff080000
8368: 870c4104
836c: 00000088
8370: 00000000
8374: 00000000
8378: 00000000
837c: 00000000
8380: 00000000
8384: 00000000
8388: 00000000
838c: 00000000
8390: 00000000
8394: 00000000
8398: 00000000
839c: 00000000
83a0: 00000000
83a4: 00000000
83a8: 1fa60fd2
83ac: ff080000
83b0: 870c4104
83b4: 00000088
83b8: 00000000
83bc: 00000000
83c0: 00000000
83c4: 00000000
83c8: 00000000
83cc: 00000000
83d0: 00000000
83d4: 00000000
83d8: 00000000
83dc: 00000000
83e0: 00000000
83e4: 00000000
83e8: 00000000
83ec: 00000000
83f0: 1fa20fd0
83f4: ff080000
83f8: fa0d4103
83fc: 00000000
8400: 00000000
8404: 00000000
8408: 00000000
840c: 00000000
8410: 00000000
8414: 00000000
8418: 00000000
841c: 00000000
8420: 00000000
8424: 00000000
8428: 00000000
842c: 00000000
8430: 00000000
8434: 00000000
8438: 1fa60fd2
843c: ff080000
8440: fa0d4103
8444: 00000000
8448: 00000000
844c: 00000000
8450: 00000000
8454: 00000000
8458: 00000000
845c: 00000000
8460: 00000000
8464: 00000000
8468: 00000000
846c: 00000000
8470: 00000000
8474: 00000000
8478: 00000000
847c: 00000000
8480: 1faa4fd4
8484: ff080000
8488: fa0d4103
848c: 00000000
8490: 00000000
8494: 00000000
8498: 00000000
849c: 00000000
84a0: 00000000
84a4: 00000000
84a8: 00000000
84ac: 00000000
84b0: 00000000
84b4: 00000000
84b8: 00000000
84bc: 00000000
84c0: 00000000
84c4: 00000000
84c8: 1fa20fd0
84cc: ff080000
84d0: 870c4104
84d4: 00000088
84d8: 00000000
84dc: 00000000
84e0: 00000000
84e4: 00000000
84e8: 00000000
84ec: 00000000
84f0: 00000000
84f4: 00000000
84f8: 00000000
84fc: 00000000
8500: 00000000
8504: 00000000
8508: 00000000
850c: 00000000
8510: 1fa64fd2
8514: ff080000
8518: 870c4104
851c: 00000088
8520: 00000000
8524: 00000000
8528: 00000000
852c: 00000000
8530: 00000000
8534: 00000000
8538: 00000000
853c: 00000000
8540: 00000000
8544: 00000000
8548: 00000000
854c: 00000000
8550: 00000000
8554: 00000000
8558: 1fa3cfd0
855c: ff080000
8560: fa0d4103
8564: 00000000
8568: 00000000
856c: 00000000
8570: 00000000
8574: 00000000
8578: 00000000
857c: 00000000
8580: 00000000
8584: 00000000
8588: 00000000
858c: 00000000
8590: 00000000
8594: 00000000
8598: 00000000
859c: 00000000
85a0: 1fa5ffd2
85a4: ff080000
85a8: fa0d4103
85ac: 00000000
85b0: 00000000
85b4: 00000000
85b8: 00000000
85bc: 00000000
85c0: 00000000
85c4: 00000000
85c8: 00000000
85cc: 00000000
85d0: 00000000
85d4: 00000000
85d8: 00000000
85dc: 00000000
85e0: 00000000
85e4: 00000000
85e8: 1faa4fd4
85ec: ff080000
85f0: fa0d4103
85f4: 00000000
85f8: 00000000
85fc: 00000000
8600: 00000000
8604: 00000000
8608: 00000000
860c: 00000000
8610: 00000000
8614: 00000000
8618: 00000000
861c: 00000000
8620: 00000000
8624: 00000000
8628: 00000000
862c: 00000000
8630: 1f7c0000
8634: 00480000
8638: 1f7c0000
863c: 01480000
8640: 1f7c0000
8644: 02480000
8648: 1f7c0000
864c: 03480000
8650: 1f7c0000
8654: 04480000
8658: 1f7c0000
865c: 00880000
8660: 550d0102
8664: 55555555
8668: 00000000
866c: 00000000
8670: 00000000
8674: 00000000
8678: 00000000
867c: 00000000
8680: 00000000
8684: 00000000
8688: 00000000
868c: 00000000
8690: 00000000
8694: 00000000
8698: 00000000
869c: 00000000
86a0: 1f7c0000
86a4: 01880000
86a8: 550c0102
86ac: 55555555
86b0: 00000000
86b4: 00000000
86b8: 00000000
86bc: 00000000
86c0: 00000000
86c4: 00000000
86c8: 00000000
86cc: 00000000
86d0: 00000000
86d4: 00000000
86d8: 00000000
86dc: 00000000
86e0: 00000000
86e4: 00000000
86e8: 1f7c0000
86ec: 02880000
86f0: 550d0102
86f4: 55555555
86f8: 00000000
86fc: 00000000
8700: 00000000
8704: 00000000
8708: 00000000
870c: 00000000
8710: 00000000
8714: 00000000
8718: 00000000
871c: 00000000
8720: 00000000
8724: 00000000
8728: 00000000
872c: 00000000
8730: 1f7c0000
8734: 03880000
8738: 550c0102
873c: 55555555
8740: 00000000
8744: 00000000
8748: 00000000
874c: 00000000
8750: 00000000
8754: 00000000
8758: 00000000
875c: 00000000
8760: 00000000
8764: 00000000
8768: 00000000
876c: 00000000
8770: 00000000
8774: 00000000
8778: 1f7c0000
877c: 04880000
8780: 550c0102
8784: 55555555
8788: 00000000
878c: 00000000
8790: 00000000
8794: 00000000
8798: 00000000
879c: 00000000
87a0: 00000000
87a4: 00000000
87a8: 00000000
87ac: 00000000
87b0: 00000000
87b4: 00000000
87b8: 00000000
87bc: 00000000
87c0: 00000000
87c4: 00000000
87c8: 00000000
87cc: 00000000
87d0: 00000000
87d4: 00000000
87d8: 00000000
87dc: 00000000
87e0: 00000000
87e4: 00000000
87e8: 00000000
87ec: 00000000
87f0: 00000000
87f4: 00000000
87f8: 00000000
87fc: 00000000

6076.1(6).txt1.After reviewing multiple failed register dumps, as shown in the attachment, 0x1018 [0] is always 0
2.The introduction of 0x0800 [7:6] cannot be found in the specification sheet. Please provide it.

3.Can we confirm from the current phenomenon and regdump whether it is a software related issue or a hardware issue?

4.How should we analyze next?

0 wang Ranen 19 days ago in reply to wang Ranen

Intellectual 320 points

4370.1(4).txt 7103.regdump.txt

Fullscreen 6445.1(7).txt Download

0000: 4e414354
0004: 30353534
0008: 00110201
000c: 00000008
0010: 3f3f0000
0800: c80004a8
0804: 00000002
0808: 00000000
080c: 00000000
0810: 00000000
0814: 00000000
0818: 00000000
081c: 00000000
0820: 000004a2
0824: 28001801
0828: 00000000
082c: 00000000
0830: 8096a8ff
1000: 32150320
1004: 87654321
1008: 00000000
100c: 00000a33
1010: 00000080
1014: 00000000
1018: 00000000
101c: 00004409
1020: 00000000
1024: 00000000
1028: ffff0000
102c: 0000ffff
1030: 00000000
1034: 00000000
1038: 00000000
103c: 00000000
1040: 00000000
1044: 0000070f
1048: 00000000
104c: 00000000
1050: 28001801
1054: 27ffffff
1058: 00000000
105c: 00000001
1060: 00000000
1064: 00000000
1068: 00000000
106c: 00000000
1070: 00000000
1074: 00000000
1078: 00000000
107c: 00000000
1080: 00000000
1084: 00000000
1088: 00000000
108c: 00000000
1090: 1fffffff
1094: 00000000
1098: 00000000
109c: 00000000
10a0: 00160000
10a4: 000c0705
10a8: 00000006
10ac: 00000000
10b0: 00000630
10b4: 00000000
10b8: 00000000
10bc: 00000777
10c0: 05000658
10c4: 00040405
10c8: 00000007
10cc: 00000000
10d0: 00000000
10d4: 00000000
10d8: 0000001f
10dc: 00000000
10e0: 00000000
10e4: 00000000
10e8: 00000000
10ec: 00000000
10f0: 00050630
10f4: 00040301
10f8: 00000002
10fc: 00000000
8000: 1fa3cfd0
8004: ff080000
8008: 870c4104
800c: 00000078
8010: 00000000
8014: 00000000
8018: 00000000
801c: 00000000
8020: 00000000
8024: 00000000
8028: 00000000
802c: 00000000
8030: 00000000
8034: 00000000
8038: 00000000
803c: 00000000
8040: 00000000
8044: 00000000
8048: 1fa60fd2
804c: ff080000
8050: 870c4104
8054: 00000078
8058: 00000000
805c: 00000000
8060: 00000000
8064: 00000000
8068: 00000000
806c: 00000000
8070: 00000000
8074: 00000000
8078: 00000000
807c: 00000000
8080: 00000000
8084: 00000000
8088: 00000000
808c: 00000000
8090: 1fa20fd0
8094: ff080000
8098: fa0d4103
809c: 00000000
80a0: 00000000
80a4: 00000000
80a8: 00000000
80ac: 00000000
80b0: 00000000
80b4: 00000000
80b8: 00000000
80bc: 00000000
80c0: 00000000
80c4: 00000000
80c8: 00000000
80cc: 00000000
80d0: 00000000
80d4: 00000000
80d8: 1fa60fd2
80dc: ff080000
80e0: fa0d4103
80e4: 00000000
80e8: 00000000
80ec: 00000000
80f0: 00000000
80f4: 00000000
80f8: 00000000
80fc: 00000000
8100: 00000000
8104: 00000000
8108: 00000000
810c: 00000000
8110: 00000000
8114: 00000000
8118: 00000000
811c: 00000000
8120: 1faa4fd4
8124: ff080000
8128: fa0d4103
812c: 00000000
8130: 00000000
8134: 00000000
8138: 00000000
813c: 00000000
8140: 00000000
8144: 00000000
8148: 00000000
814c: 00000000
8150: 00000000
8154: 00000000
8158: 00000000
815c: 00000000
8160: 00000000
8164: 00000000
8168: 1fa3cfd0
816c: ff080000
8170: 870c4104
8174: 00000088
8178: 00000000
817c: 00000000
8180: 00000000
8184: 00000000
8188: 00000000
818c: 00000000
8190: 00000000
8194: 00000000
8198: 00000000
819c: 00000000
81a0: 00000000
81a4: 00000000
81a8: 00000000
81ac: 00000000
81b0: 1fa60fd2
81b4: ff080000
81b8: 870c4104
81bc: 00000088
81c0: 00000000
81c4: 00000000
81c8: 00000000
81cc: 00000000
81d0: 00000000
81d4: 00000000
81d8: 00000000
81dc: 00000000
81e0: 00000000
81e4: 00000000
81e8: 00000000
81ec: 00000000
81f0: 00000000
81f4: 00000000
81f8: 1fa3cfd0
81fc: ff080000
8200: fa0d4103
8204: 00000000
8208: 00000000
820c: 00000000
8210: 00000000
8214: 00000000
8218: 00000000
821c: 00000000
8220: 00000000
8224: 00000000
8228: 00000000
822c: 00000000
8230: 00000000
8234: 00000000
8238: 00000000
823c: 00000000
8240: 1fa64fd2
8244: ff080000
8248: fa0d4103
824c: 00000000
8250: 00000000
8254: 00000000
8258: 00000000
825c: 00000000
8260: 00000000
8264: 00000000
8268: 00000000
826c: 00000000
8270: 00000000
8274: 00000000
8278: 00000000
827c: 00000000
8280: 00000000
8284: 00000000
8288: 1faa4fd4
828c: ff080000
8290: fa0d4103
8294: 00000000
8298: 00000000
829c: 00000000
82a0: 00000000
82a4: 00000000
82a8: 00000000
82ac: 00000000
82b0: 00000000
82b4: 00000000
82b8: 00000000
82bc: 00000000
82c0: 00000000
82c4: 00000000
82c8: 00000000
82cc: 00000000
82d0: 1fa3cfd0
82d4: ff080000
82d8: 870c4104
82dc: 00000088
82e0: 00000000
82e4: 00000000
82e8: 00000000
82ec: 00000000
82f0: 00000000
82f4: 00000000
82f8: 00000000
82fc: 00000000
8300: 00000000
8304: 00000000
8308: 00000000
830c: 00000000
8310: 00000000
8314: 00000000
8318: 1fa60fd2
831c: ff080000
8320: 870c4104
8324: 00000088
8328: 00000000
832c: 00000000
8330: 00000000
8334: 00000000
8338: 00000000
833c: 00000000
8340: 00000000
8344: 00000000
8348: 00000000
834c: 00000000
8350: 00000000
8354: 00000000
8358: 00000000
835c: 00000000
8360: 1fa20fd0
8364: ff080000
8368: 870c4104
836c: 00000088
8370: 00000000
8374: 00000000
8378: 00000000
837c: 00000000
8380: 00000000
8384: 00000000
8388: 00000000
838c: 00000000
8390: 00000000
8394: 00000000
8398: 00000000
839c: 00000000
83a0: 00000000
83a4: 00000000
83a8: 1fa60fd2
83ac: ff080000
83b0: 870c4104
83b4: 00000088
83b8: 00000000
83bc: 00000000
83c0: 00000000
83c4: 00000000
83c8: 00000000
83cc: 00000000
83d0: 00000000
83d4: 00000000
83d8: 00000000
83dc: 00000000
83e0: 00000000
83e4: 00000000
83e8: 00000000
83ec: 00000000
83f0: 1fa20fd0
83f4: ff080000
83f8: fa0d4103
83fc: 00000000
8400: 00000000
8404: 00000000
8408: 00000000
840c: 00000000
8410: 00000000
8414: 00000000
8418: 00000000
841c: 00000000
8420: 00000000
8424: 00000000
8428: 00000000
842c: 00000000
8430: 00000000
8434: 00000000
8438: 1fa60fd2
843c: ff080000
8440: fa0d4103
8444: 00000000
8448: 00000000
844c: 00000000
8450: 00000000
8454: 00000000
8458: 00000000
845c: 00000000
8460: 00000000
8464: 00000000
8468: 00000000
846c: 00000000
8470: 00000000
8474: 00000000
8478: 00000000
847c: 00000000
8480: 1faa4fd4
8484: ff080000
8488: fa0d4103
848c: 00000000
8490: 00000000
8494: 00000000
8498: 00000000
849c: 00000000
84a0: 00000000
84a4: 00000000
84a8: 00000000
84ac: 00000000
84b0: 00000000
84b4: 00000000
84b8: 00000000
84bc: 00000000
84c0: 00000000
84c4: 00000000
84c8: 1fa20fd0
84cc: ff080000
84d0: 870c4104
84d4: 00000088
84d8: 00000000
84dc: 00000000
84e0: 00000000
84e4: 00000000
84e8: 00000000
84ec: 00000000
84f0: 00000000
84f4: 00000000
84f8: 00000000
84fc: 00000000
8500: 00000000
8504: 00000000
8508: 00000000
850c: 00000000
8510: 1fa64fd2
8514: ff080000
8518: 870c4104
851c: 00000088
8520: 00000000
8524: 00000000
8528: 00000000
852c: 00000000
8530: 00000000
8534: 00000000
8538: 00000000
853c: 00000000
8540: 00000000
8544: 00000000
8548: 00000000
854c: 00000000
8550: 00000000
8554: 00000000
8558: 1fa3cfd0
855c: ff080000
8560: fa0d4103
8564: 00000000
8568: 00000000
856c: 00000000
8570: 00000000
8574: 00000000
8578: 00000000
857c: 00000000
8580: 00000000
8584: 00000000
8588: 00000000
858c: 00000000
8590: 00000000
8594: 00000000
8598: 00000000
859c: 00000000
85a0: 1fa5ffd2
85a4: ff080000
85a8: fa0d4103
85ac: 00000000
85b0: 00000000
85b4: 00000000
85b8: 00000000
85bc: 00000000
85c0: 00000000
85c4: 00000000
85c8: 00000000
85cc: 00000000
85d0: 00000000
85d4: 00000000
85d8: 00000000
85dc: 00000000
85e0: 00000000
85e4: 00000000
85e8: 1faa4fd4
85ec: ff080000
85f0: fa0d4103
85f4: 00000000
85f8: 00000000
85fc: 00000000
8600: 00000000
8604: 00000000
8608: 00000000
860c: 00000000
8610: 00000000
8614: 00000000
8618: 00000000
861c: 00000000
8620: 00000000
8624: 00000000
8628: 00000000
862c: 00000000
8630: 1f7c0000
8634: 00480000
8638: 1f7c0000
863c: 01480000
8640: 1f7c0000
8644: 02480000
8648: 1f7c0000
864c: 03480000
8650: 1f7c0000
8654: 04480000
8658: 1f7c0000
865c: 00880000
8660: 550d0102
8664: 55555555
8668: 00000000
866c: 00000000
8670: 00000000
8674: 00000000
8678: 00000000
867c: 00000000
8680: 00000000
8684: 00000000
8688: 00000000
868c: 00000000
8690: 00000000
8694: 00000000
8698: 00000000
869c: 00000000
86a0: 1f7c0000
86a4: 01880000
86a8: 550c0102
86ac: 55555555
86b0: 00000000
86b4: 00000000
86b8: 00000000
86bc: 00000000
86c0: 00000000
86c4: 00000000
86c8: 00000000
86cc: 00000000
86d0: 00000000
86d4: 00000000
86d8: 00000000
86dc: 00000000
86e0: 00000000
86e4: 00000000
86e8: 1f7c0000
86ec: 02880000
86f0: 550d0102
86f4: 55555555
86f8: 00000000
86fc: 00000000
8700: 00000000
8704: 00000000
8708: 00000000
870c: 00000000
8710: 00000000
8714: 00000000
8718: 00000000
871c: 00000000
8720: 00000000
8724: 00000000
8728: 00000000
872c: 00000000
8730: 1f7c0000
8734: 03880000
8738: 550c0102
873c: 55555555
8740: 00000000
8744: 00000000
8748: 00000000
874c: 00000000
8750: 00000000
8754: 00000000
8758: 00000000
875c: 00000000
8760: 00000000
8764: 00000000
8768: 00000000
876c: 00000000
8770: 00000000
8774: 00000000
8778: 1f7c0000
877c: 04880000
8780: 550c0102
8784: 55555555
8788: 00000000
878c: 00000000
8790: 00000000
8794: 00000000
8798: 00000000
879c: 00000000
87a0: 00000000
87a4: 00000000
87a8: 00000000
87ac: 00000000
87b0: 00000000
87b4: 00000000
87b8: 00000000
87bc: 00000000
87c0: 00000000
87c4: 00000000
87c8: 00000000
87cc: 00000000
87d0: 00000000
87d4: 00000000
87d8: 00000000
87dc: 00000000
87e0: 00000000
87e4: 00000000
87e8: 00000000
87ec: 00000000
87f0: 00000000
87f4: 00000000
87f8: 00000000
87fc: 00000000

3.Can we confirm from the current phenomenon and regdump whether it is a software related issue or a hardware issue?

4.How should we analyze next?

5.What waveforms of signals are needed to confirm that there are no hardware issues?

0 wang Ranen 19 days ago in reply to wang Ranen

Intellectual 320 points

<4>[ 2.719212] .(3)[1:swapper/0]tcan4x5x spi3.0 (unnamed net_device) (uninitialized): Failed to init module

1.May I ask what happened to this error? How to solve it?

0 wang Ranen 19 days ago in reply to wang Ranen

Intellectual 320 points

The driver code related to CAN has been provided, please help to check if there are any issues.m_can.rar

0 wang Ranen 19 days ago in reply to wang Ranen

Intellectual 320 points

最新的regdump如附件，请帮忙看看。

Fullscreen 1(9).txt Download

0000: 4e414354
0004: 30353534
0008: 00110201
000c: 00000008
0010: 3f3f0000
0800: c80004a8
0804: 00000002
0808: 00000000
080c: 00000000
0810: 00000000
0814: 00000000
0818: 00000000
081c: 00000000
0820: 000004a2
0824: 00001801
0828: 00000000
082c: 00000000
0830: 8096a8ff
1000: 32150320
1004: 87654321
1008: 00000000
100c: 00000a33
1010: 00000080
1014: 00000000
1018: 00000000
101c: 00004409
1020: 00000000
1024: 00000000
1028: ffff0000
102c: 0000ffff
1030: 00000000
1034: 00000000
1038: 00000000
103c: 00000000
1040: 00270000
1044: 00000708
1048: 00000000
104c: 00000000
1050: 20001801
1054: 27ffffff
1058: 00000000
105c: 00000001
1060: 00000000
1064: 00000000
1068: 00000000
106c: 00000000
1070: 00000000
1074: 00000000
1078: 00000000
107c: 00000000
1080: 00000000
1084: 00000000
1088: 00000000
108c: 00000000
1090: 1fffffff
1094: 00000000
1098: 00000000
109c: 00000000
10a0: 00140000
10a4: 00050005
10a8: 00000013
10ac: 00000000
10b0: 000005a0
10b4: 00000000
10b8: 00000000
10bc: 00000777
10c0: 050005c8
10c4: 00040405
10c8: 00000007
10cc: 00000000
10d0: 00000000
10d4: 00000000
10d8: 0000001f
10dc: 00000000
10e0: 00000000
10e4: 00000000
10e8: 00000000
10ec: 00000000
10f0: 000505a0
10f4: 00040301
10f8: 00000002
10fc: 00000000
8000: 1fa3cfd0
8004: ff080000
8008: fa0d4103
800c: 00000000
8010: 00000000
8014: 00000000
8018: 00000000
801c: 00000000
8020: 00000000
8024: 00000000
8028: 00000000
802c: 00000000
8030: 00000000
8034: 00000000
8038: 00000000
803c: 00000000
8040: 00000000
8044: 00000000
8048: 1fa60fd2
804c: ff080000
8050: fa0d4103
8054: 00000000
8058: 00000000
805c: 00000000
8060: 00000000
8064: 00000000
8068: 00000000
806c: 00000000
8070: 00000000
8074: 00000000
8078: 00000000
807c: 00000000
8080: 00000000
8084: 00000000
8088: 00000000
808c: 00000000
8090: 1faa4fd4
8094: ff080000
8098: fa0d4103
809c: 00000000
80a0: 00000000
80a4: 00000000
80a8: 00000000
80ac: 00000000
80b0: 00000000
80b4: 00000000
80b8: 00000000
80bc: 00000000
80c0: 00000000
80c4: 00000000
80c8: 00000000
80cc: 00000000
80d0: 00000000
80d4: 00000000
80d8: 1fa3cfd0
80dc: ff080000
80e0: 870c4104
80e4: 00000098
80e8: 00000000
80ec: 00000000
80f0: 00000000
80f4: 00000000
80f8: 00000000
80fc: 00000000
8100: 00000000
8104: 00000000
8108: 00000000
810c: 00000000
8110: 00000000
8114: 00000000
8118: 00000000
811c: 00000000
8120: 1fa60fd2
8124: ff080000
8128: 870c4104
812c: 00000098
8130: 00000000
8134: 00000000
8138: 00000000
813c: 00000000
8140: 00000000
8144: 00000000
8148: 00000000
814c: 00000000
8150: 00000000
8154: 00000000
8158: 00000000
815c: 00000000
8160: 00000000
8164: 00000000
8168: 1fa3cfd0
816c: ff080000
8170: fa0d4103
8174: 00000000
8178: 00000000
817c: 00000000
8180: 00000000
8184: 00000000
8188: 00000000
818c: 00000000
8190: 00000000
8194: 00000000
8198: 00000000
819c: 00000000
81a0: 00000000
81a4: 00000000
81a8: 00000000
81ac: 00000000
81b0: 1fa60fd2
81b4: ff080000
81b8: fa0d4103
81bc: 00000000
81c0: 00000000
81c4: 00000000
81c8: 00000000
81cc: 00000000
81d0: 00000000
81d4: 00000000
81d8: 00000000
81dc: 00000000
81e0: 00000000
81e4: 00000000
81e8: 00000000
81ec: 00000000
81f0: 00000000
81f4: 00000000
81f8: 1faa4fd4
81fc: ff080000
8200: fa0d4103
8204: 00000000
8208: 00000000
820c: 00000000
8210: 00000000
8214: 00000000
8218: 00000000
821c: 00000000
8220: 00000000
8224: 00000000
8228: 00000000
822c: 00000000
8230: 00000000
8234: 00000000
8238: 00000000
823c: 00000000
8240: 1fa20fd0
8244: ff080000
8248: 870c4104
824c: 00000098
8250: 00000000
8254: 00000000
8258: 00000000
825c: 00000000
8260: 00000000
8264: 00000000
8268: 00000000
826c: 00000000
8270: 00000000
8274: 00000000
8278: 00000000
827c: 00000000
8280: 00000000
8284: 00000000
8288: 1fa60fd2
828c: ff080000
8290: 870c4104
8294: 00000098
8298: 00000000
829c: 00000000
82a0: 00000000
82a4: 00000000
82a8: 00000000
82ac: 00000000
82b0: 00000000
82b4: 00000000
82b8: 00000000
82bc: 00000000
82c0: 00000000
82c4: 00000000
82c8: 00000000
82cc: 00000000
82d0: 1fa20fd0
82d4: ff080000
82d8: fa0d4103
82dc: 00000000
82e0: 00000000
82e4: 00000000
82e8: 00000000
82ec: 00000000
82f0: 00000000
82f4: 00000000
82f8: 00000000
82fc: 00000000
8300: 00000000
8304: 00000000
8308: 00000000
830c: 00000000
8310: 00000000
8314: 00000000
8318: 1fa60fd2
831c: ff080000
8320: fa0d4103
8324: 00000000
8328: 00000000
832c: 00000000
8330: 00000000
8334: 00000000
8338: 00000000
833c: 00000000
8340: 00000000
8344: 00000000
8348: 00000000
834c: 00000000
8350: 00000000
8354: 00000000
8358: 00000000
835c: 00000000
8360: 1faa4fd4
8364: ff080000
8368: fa0d4103
836c: 00000000
8370: 00000000
8374: 00000000
8378: 00000000
837c: 00000000
8380: 00000000
8384: 00000000
8388: 00000000
838c: 00000000
8390: 00000000
8394: 00000000
8398: 00000000
839c: 00000000
83a0: 00000000
83a4: 00000000
83a8: 1fa3cfd0
83ac: ff080000
83b0: 870c4104
83b4: 00000098
83b8: 00000000
83bc: 00000000
83c0: 00000000
83c4: 00000000
83c8: 00000000
83cc: 00000000
83d0: 00000000
83d4: 00000000
83d8: 00000000
83dc: 00000000
83e0: 00000000
83e4: 00000000
83e8: 00000000
83ec: 00000000
83f0: 1fa60fd2
83f4: ff080000
83f8: 870c4104
83fc: 00000098
8400: 00000000
8404: 00000000
8408: 00000000
840c: 00000000
8410: 00000000
8414: 00000000
8418: 00000000
841c: 00000000
8420: 00000000
8424: 00000000
8428: 00000000
842c: 00000000
8430: 00000000
8434: 00000000
8438: 1fa3cfd0
843c: ff080000
8440: fa0d4103
8444: 00000000
8448: 00000000
844c: 00000000
8450: 00000000
8454: 00000000
8458: 00000000
845c: 00000000
8460: 00000000
8464: 00000000
8468: 00000000
846c: 00000000
8470: 00000000
8474: 00000000
8478: 00000000
847c: 00000000
8480: 1fa60fd2
8484: ff080000
8488: fa0d4103
848c: 00000000
8490: 00000000
8494: 00000000
8498: 00000000
849c: 00000000
84a0: 00000000
84a4: 00000000
84a8: 00000000
84ac: 00000000
84b0: 00000000
84b4: 00000000
84b8: 00000000
84bc: 00000000
84c0: 00000000
84c4: 00000000
84c8: 1faa4fd4
84cc: ff080000
84d0: fa0d4103
84d4: 00000000
84d8: 00000000
84dc: 00000000
84e0: 00000000
84e4: 00000000
84e8: 00000000
84ec: 00000000
84f0: 00000000
84f4: 00000000
84f8: 00000000
84fc: 00000000
8500: 00000000
8504: 00000000
8508: 00000000
850c: 00000000
8510: 1fa3cfd0
8514: ff080000
8518: 870c4104
851c: 00000098
8520: 00000000
8524: 00000000
8528: 00000000
852c: 00000000
8530: 00000000
8534: 00000000
8538: 00000000
853c: 00000000
8540: 00000000
8544: 00000000
8548: 00000000
854c: 00000000
8550: 00000000
8554: 00000000
8558: 1fa60fd2
855c: ff080000
8560: 870c4104
8564: 00000098
8568: 00000000
856c: 00000000
8570: 00000000
8574: 00000000
8578: 00000000
857c: 00000000
8580: 00000000
8584: 00000000
8588: 00000000
858c: 00000000
8590: 00000000
8594: 00000000
8598: 00000000
859c: 00000000
85a0: 1f7c0000
85a4: 00480000
85a8: 1f7c0000
85ac: 01480000
85b0: 1f7c0000
85b4: 02480000
85b8: 1f7c0000
85bc: 03480000
85c0: 1f7c0000
85c4: 04480000
85c8: 1f7c0000
85cc: 00880000
85d0: 550d0102
85d4: 55555555
85d8: 00000000
85dc: 00000000
85e0: 00000000
85e4: 00000000
85e8: 00000000
85ec: 00000000
85f0: 00000000
85f4: 00000000
85f8: 00000000
85fc: 00000000
8600: 00000000
8604: 00000000
8608: 00000000
860c: 00000000
8610: 1f7c0000
8614: 01880000
8618: 550c0102
861c: 55555555
8620: 00000000
8624: 00000000
8628: 00000000
862c: 00000000
8630: 00000000
8634: 00000000
8638: 00000000
863c: 00000000
8640: 00000000
8644: 00000000
8648: 00000000
864c: 00000000
8650: 00000000
8654: 00000000
8658: 1f7c0000
865c: 02880000
8660: 550d0102
8664: 55555555
8668: 00000000
866c: 00000000
8670: 00000000
8674: 00000000
8678: 00000000
867c: 00000000
8680: 00000000
8684: 00000000
8688: 00000000
868c: 00000000
8690: 00000000
8694: 00000000
8698: 00000000
869c: 00000000
86a0: 1f7c0000
86a4: 03880000
86a8: 550c0102
86ac: 55555555
86b0: 00000000
86b4: 00000000
86b8: 00000000
86bc: 00000000
86c0: 00000000
86c4: 00000000
86c8: 00000000
86cc: 00000000
86d0: 00000000
86d4: 00000000
86d8: 00000000
86dc: 00000000
86e0: 00000000
86e4: 00000000
86e8: 1f7c0000
86ec: 04880000
86f0: 550c0102
86f4: 55555555
86f8: 00000000
86fc: 00000000
8700: 00000000
8704: 00000000
8708: 00000000
870c: 00000000
8710: 00000000
8714: 00000000
8718: 00000000
871c: 00000000
8720: 00000000
8724: 00000000
8728: 00000000
872c: 00000000
8730: 00000000
8734: 00000000
8738: 00000000
873c: 00000000
8740: 00000000
8744: 00000000
8748: 00000000
874c: 00000000
8750: 00000000
8754: 00000000
8758: 00000000
875c: 00000000
8760: 00000000
8764: 00000000
8768: 00000000
876c: 00000000
8770: 00000000
8774: 00000000
8778: 00000000
877c: 00000000
8780: 00000000
8784: 00000000
8788: 00000000
878c: 00000000
8790: 00000000
8794: 00000000
8798: 00000000
879c: 00000000
87a0: 00000000
87a4: 00000000
87a8: 00000000
87ac: 00000000
87b0: 00000000
87b4: 00000000
87b8: 00000000
87bc: 00000000
87c0: 00000000
87c4: 00000000
87c8: 00000000
87cc: 00000000
87d0: 00000000
87d4: 00000000
87d8: 00000000
87dc: 00000000
87e0: 00000000
87e4: 00000000
87e8: 00000000
87ec: 00000000
87f0: 00000000
87f4: 00000000
87f8: 00000000
87fc: 00000000

0 Jonathan Nerger 18 days ago in reply to wang Ranen

TI__Mastermind 33440 points

Hi Wang,

wang Ranen said:
2.The introduction of 0x0800 [7:6] cannot be found in the specification sheet. Please provide it.

You can find this information in the datasheet.

wang Ranen said:
3.Can we confirm from the current phenomenon and regdump whether it is a software related issue or a hardware issue?

I don't see an explanation in the software configuration, or the interrupts of the device. I see the PEA bit is set indicating a message had a protocol error during the Arbitration phase, but the error counters are all zero, and the protocol status register doesn't indicate the device is in a warning or bus off condition. So it is likely not the reason for the device to stop communicating.

What I do see is that the TX FIFO is completely empty and there are no messages loaded for transmission. If the original complaint is still that there is no response from this device after a message is sent to it, then I would expect there to be a message loaded into the TX FIFO pending transmission, or the device would have been disabled due to excessive errors.

I can't at the moment say there is anything functionally wrong with the configuration of this device, or with the hardware and that my current interpretation of information you have provided points to a issue loading messages into the TX FIFO for transmission.

When your CAN Silent or No Response condition occurs, can you verify the MCU has loaded a message into the TX FIFO and has written to the TX Buffer Add Request (TXBAR) register (0x10D8) setting a "1" to the appropriate TX FIFO element used for the message?

The TX FIFO Free Level is set to 5, which is also equal to the TX FIFO Size meaning it is completely empty. The TX Buffer Request Pending register (0x10CC) also is 0x0, meaning there are no TX messages pending transmission.

I suspect the error may be software related and the MCU has stopped loading messages into the TX FIFO resulting in your CAN Silence error.

Regards,

Jonathan

0 wang Ranen 18 days ago in reply to Jonathan Nerger

Intellectual 320 points

Thank you for your reply!

There was a problem with the 158th transmission, which should be due to the MCU not sending successfully, so there was no response from the device. But the MCU keeps sending and shows that the transmission is successful, and for some reason, the tx FIFO is not written. At this time, the interrupt remains at a low level.
Why did the MCU fail to send TX FIFO?

dev_sendCan is still ok，but dev_receiveCan not called.

07-03 11:56:48.306087 3251 3325 D CanManager_307: CAN send data: 154, 7df, 0, 0, 8, 02, 01, 0d, 55, 55, 55, 55, 55,
07-03 11:56:48.307617 3251 3325 I fangkou-Zn193CantestUtil: dev_sendCan, remain data size: 16
07-03 11:56:48.313895 3251 3295 I fangkou-Zn193CantestUtil: dev_receiveCan, remain data size: 37
07-03 11:56:48.314252 3251 3325 D CanManager_314: CAN send data ok: 16
07-03 11:56:48.316619 3251 3295 I fangkou-Zn193CantestUtil: dev_receiveCan, remain data size: 33
07-03 11:56:48.319502 3251 3295 I fangkou-Zn193CantestUtil: dev_receiveCan, remain data size: 57
07-03 11:56:48.325959 3251 3290 D CanParser_3026: cnvSpeedTypeJ1979() called, speed: 250
07-03 11:56:48.332885 3251 3290 D CanParser_3026: cnvSpeedTypeJ1979() called, speed: 250
07-03 11:56:48.400514 1275 1290 D LocationManagerService: noteLocationAccess fail, no permission granted for package:com.duritech.tab.dtg provider: gps
07-03 11:56:48.400642 3251 3325 D CanManager_152: sending data for diagnosis
07-03 11:56:48.408341 3251 3325 D CanManager_307: CAN send data: 155, 7df, 0, 0, 8, 02, 01, 0c, 55, 55, 55, 55, 55,
07-03 11:56:48.410219 3251 3325 I fangkou-Zn193CantestUtil: dev_sendCan, remain data size: 16
07-03 11:56:48.415772 3251 3295 I fangkou-Zn193CantestUtil: dev_receiveCan, remain data size: 45
07-03 11:56:48.415904 3251 3321 D DtgHelper_193: 1秒数据: DtgSecData(infoDate=20250703115648, driveYMD=20250703, millis=1751543808935, speed=250.0, rpm=8674, brake=OFF, gpsX=0.0, gpsY=0.0, angle=0, commState=32, acc=1, distance=0.071)
07-03 11:56:48.416496 3251 3325 D CanManager_314: CAN send data ok: 16
07-03 11:56:48.418307 3251 3295 I fangkou-Zn193CantestUtil: dev_receiveCan, remain data size: 41
07-03 11:56:48.425804 3251 3290 D CanParser_3036: cnvRpmTypeJ1979() called, RPM: 8678
07-03 11:56:48.500675 3251 3325 D CanManager_152: sending data for diagnosis
07-03 11:56:48.506248 3251 3325 D CanManager_307: CAN send data: 156, 7df, 0, 0, 8, 02, 01, 0d, 55, 55, 55, 55, 55,
07-03 11:56:48.508211 3251 3325 I fangkou-Zn193CantestUtil: dev_sendCan, remain data size: 16
07-03 11:56:48.513987 3251 3325 D CanManager_314: CAN send data ok: 16
07-03 11:56:48.514546 3251 3295 I fangkou-Zn193CantestUtil: dev_receiveCan, remain data size: 37
07-03 11:56:48.517158 3251 3295 I fangkou-Zn193CantestUtil: dev_receiveCan, remain data size: 33
07-03 11:56:48.519628 3251 3295 I fangkou-Zn193CantestUtil: dev_receiveCan, remain data size: 57
07-03 11:56:48.526318 3251 3290 D CanParser_3026: cnvSpeedTypeJ1979() called, speed: 250
07-03 11:56:48.533225 3251 3290 D CanParser_3026: cnvSpeedTypeJ1979() called, speed: 250
07-03 11:56:48.601157 3251 3325 D CanManager_152: sending data for diagnosis
07-03 11:56:48.607225 3251 3325 D CanManager_307: CAN send data: 157, 7df, 0, 0, 8, 02, 01, 0c, 55, 55, 55, 55, 55,
07-03 11:56:48.608561 3251 3325 I fangkou-Zn193CantestUtil: dev_sendCan, remain data size: 16
07-03 11:56:48.615298 3251 3295 I fangkou-Zn193CantestUtil: dev_receiveCan, remain data size: 45
07-03 11:56:48.616117 3251 3325 D CanManager_314: CAN send data ok: 16
07-03 11:56:48.617329 3251 3295 I fangkou-Zn193CantestUtil: dev_receiveCan, remain data size: 41
07-03 11:56:48.624725 3251 3290 D CanParser_3036: cnvRpmTypeJ1979() called, RPM: 8678
07-03 11:56:48.700482 3251 3325 D CanManager_152: sending data for diagnosis
07-03 11:56:48.706331 3251 3325 D CanManager_307: CAN send data: 158, 7df, 0, 0, 8, 02, 01, 0d, 55, 55, 55, 55, 55,
07-03 11:56:48.707598 3251 3325 I fangkou-Zn193CantestUtil: dev_sendCan, remain data size: 16
07-03 11:56:48.714175 3251 3325 D CanManager_314: CAN send data ok: 16
07-03 11:56:48.800584 3251 3325 D CanManager_152: sending data for diagnosis
07-03 11:56:48.808291 3251 3325 D CanManager_307: CAN send data: 158, 7df, 0, 0, 8, 02, 01, 0c, 55, 55, 55, 55, 55,
07-03 11:56:48.809216 3251 3325 I fangkou-Zn193CantestUtil: dev_sendCan, remain data size: 16
07-03 11:56:48.812706 3251 3325 D CanManager_314: CAN send data ok: 16
07-03 11:56:48.900677 3251 3325 D CanManager_152: sending data for diagnosis
07-03 11:56:48.906386 3251 3325 D CanManager_307: CAN send data: 158, 7df, 0, 0, 8, 02, 01, 0d, 55, 55, 55, 55, 55,
07-03 11:56:48.907031 3251 3325 I fangkou-Zn193CantestUtil: dev_sendCan, remain data size: 16
07-03 11:56:48.912111 3251 3325 D CanManager_314: CAN send data ok: 16
07-03 11:56:49.000456 3251 3325 D CanManager_152: sending data for diagnosis
07-03 11:56:49.006431 3251 3325 D CanManager_307: CAN send data: 158, 7df, 0, 0, 8, 02, 01, 0c, 55, 55, 55, 55, 55,
07-03 11:56:49.007331 3251 3325 I fangkou-Zn193CantestUtil: dev_sendCan, remain data size: 16
07-03 11:56:49.012347 3251 3325 D CanManager_314: CAN send data ok: 16
07-03 11:56:49.100446 3251 3325 D CanManager_152: sending data for diagnosis
07-03 11:56:49.106518 3251 3325 D CanManager_307: CAN send data: 158, 7df, 0, 0, 8, 02, 01, 0d, 55, 55, 55, 55, 55,
07-03 11:56:49.107174 3251 3325 I fangkou-Zn193CantestUtil: dev_sendCan, remain data size: 16
07-03 11:56:49.111964 3251 3325 D CanManager_314: CAN send data ok: 16

0 Jonathan Nerger 17 days ago in reply to wang Ranen

TI__Mastermind 33440 points

Hi Wang,

This is interesting.

Do you by chance have the ability to place a logic analyzer on the SPI bus and capture the SPI communication between the MCU and the TCAN4550 into a data log?

If the MCU thinks it is transmitting messages, that is generally a SPI Write process where the message data is written into the TCAN4550. It's not clear if the MCU has a mechanism to verity that was successful and just assumes it is successful. If there is an issue with the SPI bus, then the MCU may not catch this.

However, when receiving a message this has more SPI Reads and some sort of SPI error may be more easily detected by the MCU.

Also having a log of the raw SPI read/writes leading up to and following the CAN silent error would help determine any device related issues, or any other sequence issues that may need adjustment.

Regards,

Jonathan

0 wang Ranen 16 days ago in reply to Jonathan Nerger

Intellectual 320 points

From the log, there was an abnormality in the second to last communication. After the MCU successfully sent TX data, it only triggered one interrupt and did not receive any data returned from the device. There is no log related to m_can_isr ir=0x1.
After the last communication, the MCU successfully sent TX data without triggering any interrupt, and then the MCU stopped sending.
The kernel log of the entire communication process has been uploaded, please help take a look.

倒数第三次通讯：
<4>[ 59.633474] (5)[3369:RxComputationTh]yjc m_can_start_xmit start
<4>[ 59.633506] (5)[3369:RxComputationTh]yjc m_can_start_xmit cdev->can.state=0,cdev->is_peripheral=1
<4>[ 59.633560] (5)[3369:RxComputationTh]yjc m_can_start_xmit end
<4>[ 59.633626] (5)[522:kworker/5:2]yjc m_can_tx_handler cdev->version=32,cf->can_id=0x7df
<4>[ 59.633649] (5)[522:kworker/5:2]yjc tcan4x5x_read_reg reg=196
<4>[ 59.633925] (5)[522:kworker/5:2]yjc tcan4x5x_read_reg reg=196
<4>[ 59.634174] (5)[522:kworker/5:2]yjc tcan4x5x_write_fifo addr_offset=1768,val=528220160
<4>[ 59.634402] (5)[522:kworker/5:2]yjc m_can_tx_handler putidx=4,id=0x1f7c0000,cf->len=8
<4>[ 59.634428] (5)[522:kworker/5:2]yjc tcan4x5x_write_fifo addr_offset=1772,val=76021760
<4>[ 59.634556] (5)[522:kworker/5:2]yjc tcan4x5x_write_fifo addr_offset=1776,val=1426850050
<4>[ 59.634685] (5)[522:kworker/5:2]yjc tcan4x5x_write_fifo addr_offset=1780,val=1431655765
<4>[ 59.634817] (5)[522:kworker/5:2]yjc tcan4x5x_write_reg reg=208,val=16
<4>[ 59.634939] (5)[522:kworker/5:2]yjc tcan4x5x_read_reg reg=196
<4>[ 59.635186] (4)[3343:irq/123-can0]yjc m_can_isr start444
<4>[ 59.635213] (4)[3343:irq/123-can0]yjc tcan4x5x_read_reg reg=80
<4>[ 59.635494] (7)[3343:irq/123-can0]yjc m_can_isr ir=0x1800
<4>[ 59.635522] (7)[3343:irq/123-can0]yjc tcan4x5x_write_reg reg=80,val=6144
<4>[ 59.636269] (7)[3343:irq/123-can0]yjc tcan4x5x_read_reg reg=244
<4>[ 59.636552] (7)[3343:irq/123-can0]yjc m_can_echo_tx_event txe_count=1
<4>[ 59.636577] (7)[3343:irq/123-can0]yjc tcan4x5x_read_reg reg=244
<4>[ 59.636780] (7)[3343:irq/123-can0]yjc tcan4x5x_read_fifo addr_offset=1476
<4>[ 59.637023] (7)[3343:irq/123-can0]yjc tcan4x5x_write_reg reg=248,val=4
<4>[ 59.637370] (0)[3343:irq/123-can0]yjc tcan4x5x_read_reg reg=196
<4>[ 59.637609] (7)[3343:irq/123-can0]yjc m_can_isr start444
<4>[ 59.637636] (7)[3343:irq/123-can0]yjc tcan4x5x_read_reg reg=80
<4>[ 59.637940] (7)[3343:irq/123-can0]yjc m_can_isr ir=0x1
<4>[ 59.637965] (7)[3343:irq/123-can0]yjc tcan4x5x_write_reg reg=80,val=1
<4>[ 59.638606] (7)[3343:irq/123-can0]yjc tcan4x5x_write_reg reg=92,val=0
<4>[ 59.638985] (7)[3343:irq/123-can0]yjc tcan4x5x_read_reg reg=80
<4>[ 59.639208] (7)[3343:irq/123-can0]yjc tcan4x5x_read_reg reg=68
<4>[ 59.639431] (7)[3343:irq/123-can0]yjc tcan4x5x_read_reg reg=164
<4>[ 59.639664] (7)[3343:irq/123-can0]yjc tcan4x5x_read_fifo addr_offset=1300
<4>[ 59.639906] (7)[3343:irq/123-can0]yjc tcan4x5x_read_fifo addr_offset=1296
<4>[ 59.640198] (7)[3343:irq/123-can0]yjc tcan4x5x_read_fifo addr_offset=1304
<4>[ 59.640431] (7)[3343:irq/123-can0]yjc tcan4x5x_read_fifo addr_offset=1308
<4>[ 59.640646] (7)[3343:irq/123-can0]yjc tcan4x5x_write_reg reg=168,val=18
<4>[ 59.640936] (7)[3343:irq/123-can0]yjc tcan4x5x_read_reg reg=164
<4>[ 59.641160] (4)[3343:irq/123-can0]yjc tcan4x5x_read_fifo addr_offset=1372
<4>[ 59.641451] (4)[3343:irq/123-can0]yjc tcan4x5x_read_fifo addr_offset=1368
<4>[ 59.641687] (4)[3343:irq/123-can0]yjc tcan4x5x_read_fifo addr_offset=1376
<4>[ 59.641896] (4)[3343:irq/123-can0]yjc tcan4x5x_read_fifo addr_offset=1380
<4>[ 59.642153] (4)[3343:irq/123-can0]yjc tcan4x5x_write_reg reg=168,val=19
<4>[ 59.642411] (4)[3343:irq/123-can0]yjc tcan4x5x_read_reg reg=164
<4>[ 59.642671] (4)[3343:irq/123-can0]yjc tcan4x5x_write_reg reg=92,val=1

倒数第二次通讯：
行 8074: <4>[ 59.734167] (6)[3369:RxComputationTh]yjc m_can_start_xmit start
行 8075: <4>[ 59.734198] (6)[3369:RxComputationTh]yjc m_can_start_xmit cdev->can.state=0,cdev->is_peripheral=1
行 8076: <4>[ 59.734261] (6)[3369:RxComputationTh]yjc m_can_start_xmit end
行 8077: <4>[ 59.734327] (6)[43:kworker/6:0]yjc m_can_tx_handler cdev->version=32,cf->can_id=0x7df
行 8078: <4>[ 59.734350] (6)[43:kworker/6:0]yjc tcan4x5x_read_reg reg=196
行 8079: <4>[ 59.734610] (6)[43:kworker/6:0]yjc tcan4x5x_read_reg reg=196
行 8080: <4>[ 59.734939] (6)[43:kworker/6:0]yjc tcan4x5x_write_fifo addr_offset=1480,val=528220160
行 8081: <4>[ 59.735068] (6)[43:kworker/6:0]yjc m_can_tx_handler putidx=0,id=0x1f7c0000,cf->len=8
行 8082: <4>[ 59.735094] (6)[43:kworker/6:0]yjc tcan4x5x_write_fifo addr_offset=1484,val=8912896
行 8083: <4>[ 59.735270] (6)[43:kworker/6:0]yjc tcan4x5x_write_fifo addr_offset=1488,val=1426915586
行 8084: <4>[ 59.735394] (6)[43:kworker/6:0]yjc tcan4x5x_write_fifo addr_offset=1492,val=1431655765
行 8085: <4>[ 59.735524] (6)[43:kworker/6:0]yjc tcan4x5x_write_reg reg=208,val=1
行 8086: <4>[ 59.735994] (7)[3343:irq/123-can0]yjc m_can_isr start444
行 8087: <4>[ 59.736022] (7)[3343:irq/123-can0]yjc tcan4x5x_read_reg reg=80
行 8088: <4>[ 59.736497] (6)[43:kworker/6:0]yjc tcan4x5x_read_reg reg=196
行 8089: <4>[ 59.737120] (7)[3343:irq/123-can0]yjc m_can_isr ir=0x1800
行 8090: <4>[ 59.737148] (7)[3343:irq/123-can0]yjc tcan4x5x_write_reg reg=80,val=6144
行 8091: <4>[ 59.738076] (5)[3343:irq/123-can0]yjc tcan4x5x_read_reg reg=244
行 8092: <4>[ 59.738269] (5)[3343:irq/123-can0]yjc m_can_echo_tx_event txe_count=1
行 8093: <4>[ 59.738293] (5)[3343:irq/123-can0]yjc tcan4x5x_read_reg reg=244
行 8094: <4>[ 59.738532] (5)[3343:irq/123-can0]yjc tcan4x5x_read_fifo addr_offset=1444
行 8095: <4>[ 59.738770] (5)[3343:irq/123-can0]yjc tcan4x5x_write_reg reg=248,val=0
行 8096: <4>[ 59.739017] (5)[3343:irq/123-can0]yjc tcan4x5x_read_reg reg=196

最后一次通讯：
行 8105: <4>[ 59.833022] (6)[3369:RxComputationTh]yjc m_can_start_xmit start
行 8106: <4>[ 59.833055] (6)[3369:RxComputationTh]yjc m_can_start_xmit cdev->can.state=0,cdev->is_peripheral=1
行 8107: <4>[ 59.833128] (6)[3369:RxComputationTh]yjc m_can_start_xmit end
行 8108: <4>[ 59.833196] (6)[43:kworker/6:0]yjc m_can_tx_handler cdev->version=32,cf->can_id=0x7df
行 8109: <4>[ 59.833220] (6)[43:kworker/6:0]yjc tcan4x5x_read_reg reg=196
行 8110: <4>[ 59.833528] (6)[43:kworker/6:0]yjc tcan4x5x_read_reg reg=196
行 8111: <4>[ 59.834100] (6)[43:kworker/6:0]yjc tcan4x5x_write_fifo addr_offset=1552,val=528220160
行 8112: <4>[ 59.834354] (6)[43:kworker/6:0]yjc m_can_tx_handler putidx=1,id=0x1f7c0000,cf->len=8
行 8113: <4>[ 59.834381] (6)[43:kworker/6:0]yjc tcan4x5x_write_fifo addr_offset=1556,val=25690112
行 8114: <4>[ 59.834568] (6)[43:kworker/6:0]yjc tcan4x5x_write_fifo addr_offset=1560,val=1426850050
行 8115: <4>[ 59.834751] (6)[43:kworker/6:0]yjc tcan4x5x_write_fifo addr_offset=1564,val=1431655765
行 8116: <4>[ 59.834985] (6)[43:kworker/6:0]yjc tcan4x5x_write_reg reg=208,val=2
行 8117: <4>[ 59.835195] (6)[43:kworker/6:0]yjc tcan4x5x_read_reg reg=196

From the log, there was an abnormality in the second to last communication. After the MCU successfully sent TX data, it only triggered one interrupt and did not receive any data returned from the device. There is no log related to m_can_isr ir=0x1.

0 wang Ranen 16 days ago in reply to wang Ranen

Intellectual 320 points

0 Jonathan Nerger 15 days ago in reply to wang Ranen

TI__Mastermind 33440 points

Hi Wang,

wang Ranen said:
After the MCU successfully sent TX data, it only triggered one interrupt and did not receive any data returned from the device.

I'm not sure if this means the device returned a value of 0x0 because that was the value of the register being read, or if there was an error and a value of 0x0 was returned because the device was not responding to the SPI Read.

If the device failed to return data during a SPI Read transaction, then there could be a clock issue. The digital core and MCAN controller directly operate off of the High Speed Clock (crystal) connected to the OSC1 and OSC2 pins. If it is disrupted, then the digital core will not be able to load the register data into the SPI Interface FIFO to be retrieved by the MCU using the slower SPI Clock. Also, the MCAN will not be able to transmit or receive CAN messages.

The MCU will load data into the SPI Interface FIFO using the SPI Clock during a SPI Write Transaction and the TCAN4550 digital core will pull that data out of the FIFO using the high speed OSC clock.

Likewise the TCAN4550 digital core will load data into the SPI FIFO using the high speed OSC clock during a SPI read and the MCU will pull that data out of the FIFO using the SPI Clock.

If either the SPI Clock or OSC clock is disrupted, SPI communication will fail. Because the SPI communication is controlled by the MCU the only signal controlled by the TCAN4550 is the SDO (MISO) signal.

On several occasions in my previous posts I have brought up the clock circuit and crystal capacitor values. I have not seen a response, to those comments, but I need you to verify the crystal circuit is optimized properly and providing a stable clock. Most SPI and CAN errors such as this that are not related to the register configuration are generally the result of an unstable clock.

From your schematic I see a crystal part number of "7M11000002" and 22pF capacitor values. Searching for information on "7M11000002" I only see references for crystals with that part number that have a total load capacitance of 12pF.

Can you verify the total load capacitance requirements for your particular crystal? Using an estimate of 3pF of PCB capacitance along with the 22pF load caps, I calculate an approximate total load capacitance on your crystal of 18.75pF. If the load capacitors are too large, it can cause the oscillations to stop or fail to start. These disruptions can also be intermittent and vary with other conditions such as temperature which causes a shift in the amount of parasitic capacitance.

Please review the TCAN455x Clock Optimization and Design Guidelines Application Report (Link).

If your crystal has a lower clock capacitance specification, can you adjust value of the capacitors on your board and see if there is any change to your test results by making the failure more or less frequent?

Regards,

Jonathan

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