DS125DF1610: Circuit connection confirmation

Lu Jialin

Part Number: DS125DF1610

Tool/software:

Hi TI teams

We plan to adopt the DS125DF1610FB in this project design. Could you kindly review the following circuit connections of the DS125DF1610 and advise whether any modifications are recommended?

Please note that UP16_CH refers to the channel on the ATE, and the PRBS signal will operate at 3 Gbps.

Thanks

22 days ago

0 Gregory Kobyakov 21 days ago

TI__Intellectual 1815 points

Hi JL,

The schematic looks good overall. To clarify, what signal are you using for the REF_CLK? Differential inputs are recommended to be AC coupled with 1 µF capacitors. If a single-ended input is being used, LVCMOS ref clock should applied to REF_CLK_P, and REF_CLK_N should be floated. The signal should be DC coupled in this case.

Best regards,

Greg

0 Lu Jialin 20 days ago

Prodigy 80 points

Hi Greg,

Thank you for your confirmation.

We plan to use REF_CLK in differential mode. May I ask if CLK_MON_P/N also requires this configuration?

thanks

Jialin

0 Gregory Kobyakov 19 days ago in reply to Lu Jialin

TI__Intellectual 1815 points

Hi Jialin,

In that case, the inputs to REF_CLK are suggested to be AC coupled with 1 µF capacitors. The CLK_MON should also be AC coupled.

Best regards,

Greg

0 Lu Jialin 17 days ago in reply to Gregory Kobyakov

Prodigy 80 points

Hi Gerg

Does CLK_MON also require adding 1 µF capacitors?

Thanks

Jialin

0 Gregory Kobyakov 17 days ago in reply to Lu Jialin

TI__Intellectual 1815 points

Hi Jialin,

Yes, the CLK_MON is also suggested to be AC coupled with 1 µF capacitors.

Best regards,

Greg

0 Lu Jialin 16 days ago in reply to Gregory Kobyakov

Prodigy 80 points

Hi Greg

Thank you for your reply. I have modified the circuit based on your suggestions. The updated circuit is shown below. Could you please help review it again and let me know if there are any further recommended connection changes?