SN75DP159: EyeScan Control function

Part Number: SN75DP159
Other Parts Discussed in Thread: TMDS181, TUSB3410

Tool/software:

Hi  Tier

Can DP159 support the Eye Scan function? If supported, could you give my customer some guide?


Can DP159's TMDS disparity or data errors be used to count the number of bit errors when TMDS is transmitted properly? In datashett , Do We only need set bit[7:4] of the 16h register to 1 to enable bit error statistics? but we tested it , it doesn't work .

Test method: Modify the data polarity of the FPGA's HDMI PHY output, DP159 doesn't have an increase in BERT_CNT. but the display SCDC register error is increased, Explain that modifying the data polarity can create a bit error scenario, not detected by DP159. 

Do you know why , could you give some guidance.

Thank you very much.

  • Hi,

    Do they need the Eye Scan or the Pattern Verifier function? 

    For Pattern Verifier function, please see this app note. The SNxDP159/DP149 and TMDS181/171 devices have a pattern verification functions on each RX lane. The pattern verification functions supports several standard pseudo-random bit stream (PRBS) sequences, as well as clock pattern and user-defined custom patterns.

    Thanks

    David

  • Hi David

    My customer are currently experiencing the problem: Sony and LG brand 4K display occasionally show black screen 1 to 2 seconds after recovery normal. For LG display test , customer have detected a tmds character error through the SCDC register specified by the HDMI protocol.
    Customer need to confirm if the link from FPGA to DP159 or DP159 to Monitor is experiencing an error, so the following needs require we to provide the relevant register table and configuration process:


    A. Customer need a method always monitor TMDS disparity or data errors (do not use USB-to-i2c to debug DP159) without breaking down their product during normal use. Are there other statuses that can indicate if there is an error in the transmitted data?


    B.The eye scan tool needs to be tested to confirm signal quality, possibly adjusting the signal from the FPGA output, and also monitoring the FPGA to DP159 link for sign errors to confirm proper parameters. For the initial verification step of a single machine, customer can use the USB to iic tool first, and then they want to integrate the eye scan test function into our device. Is this possible?
    The following is a hardware link diagram:

  • Look like customer have to use EVM or TUSB3410 to get communication with EYE SCAN TOOL GUI? 

    We only can use GUI to get eye scan.Right?

  • Hi,

    Look like customer have to use EVM or TUSB3410 to get communication with EYE SCAN TOOL GUI? 

    We only can use GUI to get eye scan.Right?

    Correct. The GUI is tied to the TUSB3410 VID and PID. What they can do is to connect the TUSB3410 I2C output on the DP159 EVM to the DP159 I2C on their board to enable the GUI function

    Can they please share their schematic for review?

    Thanks

    David

  • Hi David

    Customer need a method which can monitor TMDS disparity or data errors with their FPGA without GUI. Do we have this method can support customer? 

  • Please let me move this issue to email. Thank you very much.

  • Hi,

    I provided my response through email.

    Thanks

    David