DP83867IS: Configuration for Compliance Testing

Ryu Yamashita

Part Number: DP83867IS

Tool/software:

Hi team,

The Ethernet compliance test performed on the board using the DP83867IS resulted in a failure.
I believe the following register settings are provided for adjusting the signal waveform.
Could you please explain each register:
- What function it performs
- The maximum and minimum values for the setting
- How the effect changes when the value is increased or decreased

　　8.6.44 Configuration for Receiver's Equalizer　　：CONFIG_REC_EQ

　　8.6.46 Configuration of Receiver's LPF　　　　　：CONFIG_REC_LPF

　　8.6.47 Enable Control of Receiver's Equalizer　　：EN_CTRL_REC_EQ

　　8.6.51 Loopback Configuration Register　　　　：LOOP_CFG_VAL

　　8.6.52 DSP Configuration　　　　　　　　　　：DSP_CONFIG

　　8.6.53 DSP Feedforward Equalizer Configuration：FFE_EQ

Additionally, if there are any registers that allow adjustment of the signal waveform, please advise.

Best Regards,
Ryu.

21 days ago

0 J 20 days ago

TI__Genius 13526 points

Hi Yamashita-san,

What tests is the customer failing? Has the customer looked at our documentation on compliance testing? Normally, aforementioned registers are not used for configuration to pass compliance test.

Best,
J

0 Kengo.Y 16 days ago in reply to J

Guru 11255 points

Hi J-san,

Thank you for your reply.
I'm Ryu's colleague.

Bellow is the customer failing tests.

1000Base-T Common Mode Voltage

Point A Peak Output Voltage(w/o Disturbing Signal)

Point B Peak Output Voltage(w/o Disturbing Signal)

Point D Peak Output Voltage(w/o Disturbing Signal)

BR,
Kengo.

0 J 16 days ago in reply to Kengo.Y

TI__Genius 13526 points

Hi Kengo-san,

Has the customer tried implementing the script mentioned in the document from the previous post? For most of our customers, using that script on test mode 1 resolved issues on the voltage tests.

Best,

0 Kengo.Y 15 days ago in reply to J

Guru 11255 points

Hi J-san,

Some boards are failing tests due to low swing levels.
I believe pattern modifications are needed, but it is difficult to implement them immediately.
Does the IC have a waveform adjustment function?

BR,
Kengo

0 J 15 days ago in reply to Kengo.Y

TI__Genius 13526 points

Hi Kengo-san,

01D5h = 0xF508 will increase the swing as mentioned in the documentation I linked in the previous post.

Best,
J

0 Kengo.Y 15 days ago in reply to J

Guru 11255 points

Hi J-san,

Thank you!
That's make sense.

BR,
Kengo.

0 Kengo.Y 14 days ago in reply to Kengo.Y

Guru 11255 points

Hi J-san,

I had already entered this settings.(01D5h = 0xF508 )
Is there another way?

Also, is there a register to suppress waveform overshoot?

BR,
Kengo.

+1 J 14 days ago in reply to Kengo.Y

TI__Genius 13526 points

Hi Kengo-san,

You can fine tune the Vpp by using registers 0x00A0. 01D5h setting enables the register value in 0x00A0 to work.
Below is the table on the register:

What overshoot are you trying to suppress?

Best,
J

0 Ryu Yamashita 13 days ago in reply to J

Genius 3705 points

Hi J-san,

Thank you for your reply.
I am experiencing ringing-like phenomena in the output pattern of 100Base-TX overshoot and wish to suppress this.
I was considering whether we could address this using the available EMC equalizer functions.

Best Regards,
Ryu.

+1 J 13 days ago in reply to Ryu Yamashita

TI__Genius 13526 points

Hi Yamashita-san,

I am not aware of any register settings to change overshoot.
Where is this signal being measured? And is this causing a problem?

Best,
J

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DP83867IS: Configuration for Compliance Testing