Tool/software:
Hi team
Could you tell the difference between GRST and PERST?
Could you also tell when they should use GRST and PERST?
Regards,
Noriyuki Takahashi
Hi Noriyuki :
GRST is general reset for all XIO2001.
PERST is PCIe reset for XIO2001 PICe interface.
Best
brian
Hi Brian,
According to table 8-1, /PERST is used to reset all control register bis that are not indicated by d by the ☆ symbol. Is this right?
However, I can't see any registers with the ☆ symbol in the datasheet. How should I understand registers for /PERST?
Regards,
Noriyuki Takahashi
Hi Noriyuki :
It seems datasheet is not consistent, bit with (2) are sticky bits.
Best
Brian
Hi Brian,
Thanks.
They are still not sure when /PERST needs to be used. Could you tell when they should use /PERST?
Regards,
Noriyuki Takahashi
Hi Noriyuki :
an upstream PCI Express device to generate a PCI Express reset and to signal a system power good condition.
When PERST is asserted low, the XIO2001 generates an internal PCI Express reset as defined in the PCI Express specification.
When PERST transitions from low to high, a system power good condition is assumed by the XIO2001.
Note:
The system must assert PERST before power is removed, before REFCLK is removed or before REFCLK becomes unstable.
Best
Brian
Hi Brian,
Sorry, I am still not sure when /PERST is used in terms of system perspective.
Based on the datasheet, it seems that /PERST needs to be used during power-up/down sequnencing. Is this right?
Are there any other case else when /PERST should be used?
Could you also confirm below?
When PERST is asserted low, does the device asserts PCI bus reset ( PRST)?
They understand that GRST is asserted low, the bridge asserts PCI bus reset ( PRST).
Regards,
Noriyuki Takahashi
it seems that /PERST needs to be used during power-up/down sequnencing. Is this right?
correct. PERST# signal is an open drain, active low output from the root port. It is released when all power rails and the REFCLK signal have stabilized.
Are there any other case else when /PERST should be used?
PERST signal is also used in the PCIe L2/L3 low power mode exit sequence..
When PERST is asserted low, does the device asserts PCI bus reset ( PRST)?
They understand that GRST is asserted low, the bridge asserts PCI bus reset ( PRST).
both are correct.
Best
brian
Hi Brian,
When PERST is asserted low, does the device asserts PCI bus reset ( PRST)?
Regards,
Noriyuki Takahashi
When PERST is asserted low, XIO2001 asserts the internal PCI bus reset. but not on PRST terminal.
Best
brian