DS90UB949A-Q1: FPD-LINK III Technical Inquiry

Part Number: DS90UB949A-Q1

Tool/software:

Hi Team,

The customer has some problems using FPD-LINK III. Please help me take a look. Thank you.

1. A customer's cockpit project currently uses the DS90UB949/947 (dual-channel HSD interface) deserializer chip. I'd like to understand the performance requirements (such as insertion loss and return loss) for the SI evaluation of cable harness selection. Are there any relevant design manuals or instructions available?
2.The customer plans to use a 4.5m HSD cable harness for their product. The following data is available for testing of a 4m cable harness. If the length is extended, the far-end crosstalk and near-end crosstalk performance may meet the standards. Is there any margin for these performance indicators on the chip side?

  • 1) Are there any unreasonable requirements for the internally developed cable harness performance standards?
  • 2) 4m test data, crosstalk data has reached the limit. If it is extended to 4.5m, is there any margin at the chip end? What is the standard of this data?

3. Does FPD-LINK III have an eye diagram test method document? How can customers test it? Can signal quality be judged using the eye diagram?

  • Hi Alon,

    1. A customer's cockpit project currently uses the DS90UB949/947 (dual-channel HSD interface) deserializer chip.

    Both the 949 and 947 are serializer devices, not deserializers as described above. Can you please clarify on what devices the customer is using, both on the serializer and deserializer side?

    I'd like to understand the performance requirements (such as insertion loss and return loss) for the SI evaluation of cable harness selection. Are there any relevant design manuals or instructions available?

    Please consult with the cable vendor for more details on this front.

    The following data is available for testing of a 4m cable harness. If the length is extended, the far-end crosstalk and near-end crosstalk performance may meet the standards. Is there any margin for these performance indicators on the chip side?

    Please consult with the cable vendor for more details on this front.

    2) 4m test data, crosstalk data has reached the limit. If it is extended to 4.5m, is there any margin at the chip end? What is the standard of this data?

    Please consult with the cable vendor for more details on this front.

    3. Does FPD-LINK III have an eye diagram test method document? How can customers test it? Can signal quality be judged using the eye diagram?

    The MAP tool can be utilized. For more details, please refer to the following app note (link).

    Best,

    Nikolas

  • Hi Nikolas,

    1. Is the chip used a 949/948 deserializer?
    2. Is there any documented signal integrity (SI) requirements for this chip?

    Thanks.

  • Hi Alon,

    1. Is the chip used a 949/948 deserializer?

    I'm not following what the question is here? Can you please confirm what the serializer and deserializer devices are? FPD-Link SerDes solutions are two-chip solutions, not a single-chip.

    2. Is there any documented signal integrity (SI) requirements for this chip?

    Channel specification documentation can be provided. Please contact your local sales representative or field applications engineer on this matter.

    Best,

    Nikolas