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DS90UB948-Q1: LINK issues

Daniel Wang (auto)
Expert 3570 points
Part Number: DS90UB948-Q1

Tool/software:

Hello team,

My customer met some link issues when debugging 947+948, it is dual port STP connection from host to display, it is configured as automatically identification in 947 and 948 registers, the link ready status is found as single link ok. If configure the host side as dual link, it is reported as no ready.

Pls help analyze it, thanks!

BR,

Daniel 

  • 0
    TI__Mastermind 23270 points

    Hi Daniel,

    How are they testing link and LOCK status? Please check the SER register 0xC and DES LOCK pin output.

    Also, what pixel clock rate is used? Note that clock rates supported will vary in single or dual-link modes: "The device supports OpenLDI clocks in the range of 25 MHz to 96 MHz over one lane, or 50 MHz to 170 MHz over two lanes."

    Best regards,
    Ikram

  • 0 in reply to Ikram Haque
    TI__Expert 3570 points

    Hello Ikram,

    We test register 0x5A of 947, and the read data is 0x1d. According to the DS description, it is Single Link, DES LOCK is high, and the clock rate is approximately 68MHz. Display resolution: 1920*1080@60Hz. The register configuration is:

    board.WriteI2C(UB947,0x5B,0x03)

    board.WriteI2C(UB947,0x40,0x10)

    board.WriteI2C(UB947,0x41,0x49)

    board.WriteI2C(UB947,0x42,0x16)

    board.WriteI2C(UB947,0x41,0x47)

    board.WriteI2C(UB947,0x42,0x20)

    board.WriteI2C(UB947,0x42,0xA0)

    board.WriteI2C(UB947,0x42,0x20)

    board.WriteI2C(UB947,0x42,0x00)

    board.WriteI2C(UB947,0x41,0x49)

    board.WriteI2C(UB947,0x42,0x00)

    board.WriteI2C(UB947,0x03,0xDA)

    board.WriteI2C(UB947,0x17,0x9E)

    board.WriteI2C(UB947,0xC6,0x21)

    Mode_SEL configuration ：

    OLDI_DUAL: Dual-pixel OpenLDI interface.

    REPEATER:  repeater mode

    MAPSEL：SPWG bit mapping

    COAX: Enable FPD-Link III for twisted pair cabling

     BR,

    Daniel

  • 0 in reply to Daniel Wang (auto)
    TI__Mastermind 23270 points

    Hi Daniel,

    Do you have the system setup for dual link, with both DOUT0 and DOUT1 connected to the 948? Please test with pattern generation with internal clock see if there is LOCK in dual-link mode.

    Also, please check the mode straps for both SER and DES.

    Best regards,
    Ikram

  • 0 in reply to Ikram Haque
    TI__Expert 3570 points

    Hello Haque,

    Ikram Haque said:
    Do you have the system setup for dual link, with both DOUT0 and DOUT1 connected to the 948? Please test with pattern generation with internal clock see if there is LOCK in dual-link mode.

    Pls. see the attachment.

    Fullscreen 947_Init.py.txt Download 
    import time

# System dependant variables - adjust according to system
UB947 = 0x18        # 947 I2C Address
UB948 = 0x68        # Remote 948 Address


def pollstate():
    count = 0
    board.WriteI2C(UB947, 0x23, 0x80)
    board.WriteI2C(UB947, 0x24, 0x80)
    mask = int('11111', 2)
    state = board.ReadI2C(UB947, 0x24, 1)
    while (state & mask) != 27:  # 27 = 5'b11011
        time.sleep(0.01)  # 10ms delay
        state = board.ReadI2C(UB947, 0x24, 1)
        count = count + 1
        if count == 10:
            print
            "Error: Serializer is not in Normal state"
            return (1)

    board.WriteI2C(UB947, 0x23, 0x0)
    board.WriteI2C(UB947, 0x24, 0x0)

board.WriteI2C(UB948,0x4A,0x01) # Disable OLDI outputs on 948 to prevent screen glitches from appearing during the init process

##### Init A Sequence

board.WriteI2C(UB947,0x5B,0x03) # Force dual FPD-Link, disable reset on PLL frequency change

board.WriteI2C(UB947,0x16,0x02) # Adjust BCC watchdog timer to minimum

board.WriteI2C(UB947,0x04,0x90) # Prevent AVMUTE for non-HDCP systems

state_error = pollstate()  # Poll 947 state machine

if state_error == 1:
    print "Serializer not in normal state"

board.WriteI2C(UB947,0x40,0x10)
board.WriteI2C(UB947,0x41,0x49)
board.WriteI2C(UB947,0x42,0x16)
board.WriteI2C(UB947,0x41,0x47)
board.WriteI2C(UB947,0x42,0x20)
board.WriteI2C(UB947,0x42,0xA0)
board.WriteI2C(UB947,0x42,0x20)
board.WriteI2C(UB947,0x42,0x00)
board.WriteI2C(UB947,0x41,0x49)
board.WriteI2C(UB947,0x42,0x00)

time.sleep(0.01)

board.WriteI2C(UB948,0x01,0x01) # Digital reset to restart AEQ
time.sleep(0.1) # Allow time for 948 to relock
board.WriteI2C(UB948,0x4A,0x00) # Enable OLDI outputs on 948

#User defined programming sequence

board.WriteI2C(UB947, 0x03, 0xDA)
board.WriteI2C(UB947, 0x17, 0x9E)
board.WriteI2C(UB947, 0x4F, 0x80)
board.WriteI2C(UB948, 0x26, 0x16)
board.WriteI2C(UB948, 0x27, 0x16)

#PATGEN programming

board.WriteI2C(UB947,0x64, 0x10) //disabled patttern
board.WriteI2C(UB947,0x66, 0x04)
board.WriteI2C(UB947,0x67, 0xbc)
board.WriteI2C(UB947,0x66, 0x05)
board.WriteI2C(UB947,0x67, 0xa7)
board.WriteI2C(UB947,0x66, 0x06)
board.WriteI2C(UB947,0x67, 0x45)
board.WriteI2C(UB947,0x66, 0x07)
board.WriteI2C(UB947,0x67, 0x80)
board.WriteI2C(UB947,0x66, 0x08)
board.WriteI2C(UB947,0x67, 0x87)
board.WriteI2C(UB947,0x66, 0x09)
board.WriteI2C(UB947,0x67, 0x43)
board.WriteI2C(UB947,0x66, 0x0a)
board.WriteI2C(UB947,0x67, 0x14)
board.WriteI2C(UB947,0x66, 0x0b)
board.WriteI2C(UB947,0x67, 0x02)
board.WriteI2C(UB947,0x66, 0x0c)
board.WriteI2C(UB947,0x67, 0x14)
board.WriteI2C(UB947,0x66, 0x0d)
board.WriteI2C(UB947,0x67, 0x08)
board.WriteI2C(UB947,0x66, 0x1a)
board.WriteI2C(UB947,0x67, 0x09) //M=9
board.WriteI2C(UB947,0x66, 0x03)
board.WriteI2C(UB947,0x67, 0x35) //N=53
board.WriteI2C(UB947,0x65, 0x04) //internal clk and timing
board.WriteI2C(UB947,0x64, 0x41)

    Ikram Haque said:
    Also, please check the mode straps for both SER and DES.

    Refer to the setting of 947 internal pattern in 947_Init.py, it cannot enter dual-link mode.

    Thanks

    BR,

    Daniel

  • 0 in reply to Daniel Wang (auto)
    TI__Mastermind 23270 points

    Hi Daniel, please give me 1-2 days to check this and get back to you.

    Best regards,
    Ikram

  • 0 in reply to Ikram Haque
    TI__Mastermind 23270 points

    Hi Daniel,

    Could you send a photo of the setup and check if both DOUT0 and DOUT1 are connected between SER and DES.

    Also, after you run the script, is there LOCK and clock output detected from the 948? The 948 should have LOCK with PATGEN enabled, in both single and dual link modes. You can check the LOCK output on DES 948 pin.

    Best regards,
    Ikram