Part Number: HD3SS3212-Q1
Tool/software:
Goodday
We have a design where we use the HD3SS3212-Q1 as a MUX to connect a FPGA 10G SERDES interface to either a SFP connector or a Marvell 10GBASE-T1 PHY on the same board. The interface type for each is configured as 10GBASE-R.
I am seeing some errors during packet tests which look like they are caused by crosstalk. Specifically in the test case where the FPGA and Marvell PHY are selected, and at the same time there is either a RJ45 10GBASE-T SFP module in the corresponding SFP connector or some traffic is being sent to the same SFP connector using a direct attach cable.
Below is a block diagram to try explain this:

1. Is this type of crosstalk expected for the HD3SS3212-Q1 despite the low crosstalk figure in the datasheet? Or could this point to a deeper issue?
2. During testing I had a design where both sides of the HD3SS3212-Q1 were AC coupled and there were no termination resistors present to set a common mode voltage. The datasheet says this should be avoided, but in my test case the 10GBASE-R traffic passed with no errors. Does this make sense or is possible?
3. On a related note the datasheet says that the common mode voltage must be from 0 to 2V (Vcm) and the maximum differential voltage is 0 to 1.8Vpp (Vdiff). Also the absolute Differnetial voltage must be between -0.5 and 2.5V. I just want to confirm that given any Vcm and Vdiff the differential voltage swing must always remain between -0.5 and 2.5V?
Thank you
