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DP83822H: PHY is not transmitting out the ethernet frame in RMII mode.

pulkit singh
Prodigy 10 points
Part Number: DP83822H

Tool/software:

Hi, I am trying to interface PHY Dp83822H with FPGA. I am able to write and read PHY registers. It is configured for RMII, 100mbps, full duplex mode.

I am sending TX[1:0] and TEN signals to PHY from FPGA (Not using MAC). It is a generic Ethernet frame with UDP payload. Everything seems correct but I am not able to see anything on the wireshark. No transmit data is coming out of PHY.dp83822h_settings.xlsx

  • 0
    TI__Genius 13026 points

    Hi, 
    Register 0x0001 shows that there is no link. If there is no link, the PHY will not be sending packets out. 

    Have you tried plugging the FPGA to a link partner and ping the link partner?
    What RMII mode is the PHY in? Is it RMII master or slave mode?


    Could you share us your schematic so we can check if there's any connection error? Can you receive packets without any issues?
    Please feel free to message me your schematic. I've sent you a friendship request. 

    Best,
    J

  • 0 in reply to J
    Prodigy 10 points

    Hi J,

    Thanks for the reply. Here is the schematic.

  • 0 in reply to pulkit singh
    Prodigy 10 points

    Hi J,

    One more query. Is it required to provide soft reset after configuring the PHY? Which register should be used for reset, X00 or X1F? What should be the appropriate value to be write for reset?

  • 0 in reply to pulkit singh
    TI__Genius 13026 points

    Hi, 

    Soft reset is recommended but is not necessary. Please use 0x1F = 0x4000 to soft reset the PHY. 

    If you could answer the questions below, that would be very helpful understanding what your test setup is. 

    J said:
    Have you tried plugging the FPGA to a link partner and ping the link partner?
    J said:
    Can you receive packets without any issues?

    In addition, are you not seeing any signals on the RMII TX lines also, or is it just on the MDI TX line?
    Have you tried putting the PHY in MII loopback mode and verify if the MII side of the PHY is okay?


    Below are the comments on the schematic:
    1. It looks like signal connections were meant for MII, not RMII. Is pin 1 connected to the MAC's clock pin?
    2. The PHY has internal termination so it does not need 33ohm resistors in the RX line. 

    If pin 1 is not connected to the MAC's clock pin and the MAC is driving the 25MHz clock into the PHY, I will recommend to put the PHY in RMII follower mode and input 50MHz clock into the PHY to make RMII work. Otherwise, RMII will not work in the current design. 

    Best,
    J