TCAN1145-Q1: SoC wake up message buffer

Part Number: TCAN1145-Q1

Tool/software:

Hi team,

can you please help me to understand the CAN wake up process correctly? Do we need to have have a small internal message buffer to wake up the attached host SoC? 

In order to read the wake up message correctly it needs to wait some time to boot the host SoC, correct? What happens to other incoming messages during that time?

Best regards

Felix

  • Hi Felix,

    For the CAN bus wakeup feature, please refer to 10.4.4.1 in datasheet. If you are referring to selective wakeup, here is an app note.

    https://www.ti.com/lit/an/slla521b/slla521b.pdf

    I'm not sure what is the host SoC here, if you mean the CAN controller or the MCU, then that's a different component. TCAN1145-Q1 is a CAN transceiver. Usually it uses INH pin to enable the MCU's PMIC. The INH pin goes from low to high in a wakeup event.

    Regards,

    Sean

  • Hi Sean,

    thank you for the answer! 

    In the Application Note is mentioned that the wake up time can take up to the trasnmission time of 4-8 frames (depending on the transmission speed). In section 2.3 the second paragraph states that a correct decoding of these frames is not necessray. Can you please tell me why?

    Since the error counter is also not incremented my guess is that the frames are also not retransmitted. Is that correct?

    Best regards

    Felix

  • Hi Felix,

    It's saying the ISO standard does not require to decode the first 8 frames correctly, our internal clock can have a frequency delta whereby it can't decode a CAN frame when it's first started. It has to "learn" how to lock onto the CAN frame. That is allowed to take 4 frames for 500K and 8 frames for 1Mbps.

    Error counter is a register function inside the CAN transceiver, and retransmitting wakeup frames is a job of the CAN controller, they are different and not conflicting. 

    Regards,

    Sean