DS90UB949-Q1: DS90UB949+DS90UB948

Aries

Part Number: DS90UB949-Q1
Other Parts Discussed in Thread: DS90UH949-Q1

Tool/software:

In my design, the serializer used is DS90UB949, and the deserializers are DS90UB948. Per the DS90UB949 datasheet, the device is capable of operating in Replicate Mode. This implies that my design could adopt the configuration of 1×949 + 2×948. Could you kindly assist in verifying the feasibility of this configuration? The block diagram of the circuit design is as follows:

11 months ago

0 Fadi Abdulhameed 11 months ago

TI__Mastermind 36970 points

Hi Aries,

The 949 can operate in replicate mode as long as the PCLK is at or below 85MHz.

Regards,
Fadi A.

0 Luna 11 months ago in reply to Fadi Abdulhameed

Prodigy 20 points

Hi，Fadi，
I have two more questions, could you please help confirm them?
1.Are there any issues with the signal line connections between 949 and 948 in the above design block diagram, and is the proposed solution feasible?
2.Could you please advise if TI has a design solution where a single 949 is compatible with two 948 deserializers operating in replicate mode? And if so, could the relevant design reference materials be provided?

0 Fadi Abdulhameed 11 months ago in reply to Luna

TI__Mastermind 36970 points

Hi Luna,

Luna said:
1.Are there any issues with the signal line connections between 949 and 948 in the above design block diagram, and is the proposed solution feasible?

No issue, the only thing you need to make sure is your video PCLK doesn't exceed 85 Mhz per FPD port and only 24 bpp for video.

Luna said:
2.Could you please advise if TI has a design solution where a single 949 is compatible with two 948 deserializers operating in replicate mode? And if so, could the relevant design reference materials be provided?

Yes, If the DS90UH949-Q1 detects two independent devices, it will operate in Replicate mode, sending the single channel video on both connections.

We don't have a design reference for this topology, we only have an EVM for 949 which is an evaluation module that you can use as a general reference guide for schematic and layout.

https://www.ti.com/lit/ug/snlu169/snlu169.pdf?ts=1759251260506&ref_url=https%253A%252F%252Fwww.ti.com%252Ftool%252FDS90UH949-Q1EVM

Also, 949 datasheet has a layout section on page 82 - 83 which has some recommendation on the PCB layer count and LVDS routing best practices.

- Fadi A.