Tool/software:
Hi TI team.
Could you please provide information on the IO state of the output pins when /PWDN=L?
Regards,
Matsumoto
Tool/software:
Hi TI team.
Could you please provide information on the IO state of the output pins when /PWDN=L?
Regards,
Matsumoto
Hi Matsumoto-san,
When PWDN=L, output pins will have differential voltage of 0V. Based on block diagram below, we expect output termination to remain present in power down.
Thanks,
Drew
Thank you for your response.
I would like to confirm my understanding: When the differential voltage is 0V,
does this mean that the common mode voltage is being output?
Could you please verify if this interpretation is correct?
Regards,
Matsumoto