DS90UB948-Q1: Registers 0x40 and 0x45

Part Number: DS90UB948-Q1

Tool/software:

Hello at TI e2e,

Just a really quick question.

Does register 0x40 exist in the 948 or is it in a special version of the device?

And in register 0x45[7:5], what are these bits used for?

Thanks

William

  • Hi William,

    The 0x40 register is reserved in the 948 device for lock time mechanism, register 0x45[7:5] changes the mechanism for EQ switching time, but this is also reserved as these functions are not intended to be altered.

    Let me know if you have any further questions!

    Best,

    Miguel

  • Thank you very much Miguel,

    Can I ask the consequences of writing these values to those registers?

    To register 0x40,  this data written sequentially with a short time between each.

    0xCB 0b1100 1011

    0x43  0b0100 0011

    0x4B  0b0100 1011

    0x43  0b0100 0011

    So bit 7 is set then cleared while bit 3 is toggled to 0 a couple of times.

    To register 0x45

    0x08  0b0000 1000

    0xE8  0b1110 1000

    I understand if you are prohibited from telling me since as you say they are not intended to be altered.

    Best Regards

    William

  • Hi William, 

    Register 0x40:

    Bit 7 would be the value that lock forces, and bit 3 would enable the force lock function. Disabling both allows for natural lock to occur.

    Register 0x45:

    Bits 7:5 are eq relock timings, and bits 3:0 set the EQ floor (minimum) level.

    It is recommended to leave these at default as to not interrupt the functionality on the main FPD-Link between SER / DES.

    Please let me know if you have any further questions!

    Best,

    Miguel

  • Thank you Miguel, I really appreciate you're help on this.

    Best Regards

    William