DP83822I: Applying voltage to IO pins when VDDIO is not powered

Part Number: DP83822I

Tool/software:

Hi Team,

I’m using the DP83822I and have a question regarding the absolute maximum ratings of the IO pins. According to the datasheet, the maximum input voltage is VDDIO + 0.3V.

In our system, VDDIO is supplied with 3.3V. However, there may be cases where the PHY’s VDDIO is not powered yet, while external signals (e.g., clock or other IOs) are already present and driven at 3.3V.

This situation would not occur during normal operation, but could happen in the event of a power supply failure—where the PHY loses power while the external IO signals remain active.

Would this condition violate the absolute maximum ratings and potentially damage the device? Is there any internal protection mechanism for IO pins when VDDIO is not supplied? Are there any recommended design practices to avoid such issues?

Thanks in advance!

Sincerely,

Yuta Furuki

  • Hi Yuta,

    Please note that DP83822 is an older device.

    Supplying regular level inputs to an unpowered device should not be harmful to the device. Having PHY supplies come up later is a regular use case so there shouldn't be an issue here. The abs max limit was characterized in a way that is considered legacy by today's standards. This really is applicable to active operation of the device.

    Sincerely,

    Gerome

  • Dear Gerome,

    Thank you very much for your response. I understand the characteristics of the DP83822. Your explanation was very helpful, and I feel more confident moving forward with the design. I appreciate your support.

    Best regards, Yuta Furuki