DS90UB933-Q1EVM: How to check the collect data by 933,after receive the DVP data

Hi Gong bin,

DVP data received by the 933 can be probed directly from the imager output. It's not very helpful to probe FPD encoded data from the 933 output. There are several error/status registers on the 960 which can be checked for any issues.

I see in register 0x0c that RX port 1 is enabled. Can you confirm the 933 is connected to RX port 1?

I see register 0x4c=0x00 which indicates register reads target RX port 0 register set. I see 0x4d=0x00 indicating no lock and 0x4e=0x02 indicating no FPD clock detected. This makes sense if no serializer is connected to RX port 0. Unfortunately I can't really check configuration or status from this register dump since the incorrect RX port is selected.

Can you share the following information with me to assist with debug?

• What are the video parameters of the imager you are using? What is the video format used?
• Can you share your initialization script for both the 960 and the 933? I'd like to review.
• After initialization is complete, can you repeatedly read the following error/status registers at a 1sec interval? It'll be helpful to understand if any errors occur continuously or in short bursts.
  • 960: First write 0x4c=0x12 to select RX port 1. Read 0x4d, 0x4e, 0x55, 0x56, 0x73-76, 0x7a, 0x7b, 0x90-0x9f.
  • 933: Read 0x0a-0x0c.

Best,

Lucas

Hi Lucas

thank you for your reply.

about your question, my answer is below:

1. What are the video parameters of the imager you are using? What is the video format used?

→DVP format，its pclk is：27M, FPD_Link iii Capture format is Raw12LF

2. Can you share your initialization script for both the 960 and the 933? 

→ my initialization script is below, and i make sure the 960 RX1 is connect to 933

Register Display - ALP Nano 1 - DS90UB960, Connector 1

Register	Data	Name
0x0000	0x7A	I2C_DEVICE_ID
0x0001	0x00	RESET_CTL
0x0002	0x1E	GENERAL_CFG
0x0003	0x40	REV_MASK_ID
0x0004	0xD0	DEVICE_STS
0x0005	0x01	PAR_ERR_THOLD_HI
0x0006	0x00	PAR_ERR_THOLD_LO
0x0007	0xFE	BCC_WATCHDOG_CONTROL
0x0008	0x1C	I2C_CONTROL_1
0x0009	0x10	I2C_CONTROL_2
0x000A	0x7A	SCL_HIGH_TIME
0x000B	0x7A	SCL_LOW_TIME
0x000C	0x02	RX_PORT_CTL
0x000D	0xB9	IO_CTL
0x000E	0x00	GPIO_PIN_STS
0x000F	0xFF	GPIO_INPUT_CTL
0x0010	0x00	GPIO0_PIN_CTL
0x0011	0x00	GPIO1_PIN_CTL
0x0012	0x00	GPIO2_PIN_CTL
0x0013	0x00	GPIO3_PIN_CTL
0x0014	0x00	GPIO4_PIN_CTL
0x0015	0x00	GPIO5_PIN_CTL
0x0016	0x00	GPIO6_PIN_CTL
0x0017	0x00	GPIO7_PIN_CTL
0x0018	0x00	FS_CTL
0x0019	0x00	FS_HIGH_TIME_1
0x001A	0x00	FS_HIGH_TIME_0
0x001B	0x00	FS_LOW_TIME_1
0x001C	0x00	FS_LOW_TIME_0
0x001D	0x00	MAX_FRM_HI
0x001E	0x04	MAX_FRM_LO
0x001F	0x01	CSI_PLL_CTL
0x0020	0x02	FWD_CTL1
0x0021	0x02	FWD_CTL2
0x0022	0x00	FWD_STS
0x0023	0x00	INTERRUPT_CTL
0x0024	0x00	INTERRUPT_STS
0x0025	0x00	TS_CONFIG
0x0026	0x00	TS_CONTROL
0x0027	0x00	TS_LINE_HI
0x0028	0x00	TS_LINE_LO
0x0029	0x00	TS_STATUS
0x002A	0x00	TIMESTAMP_P0_HI
0x002B	0x00	TIMESTAMP_P0_LO
0x002C	0x00	TIMESTAMP_P1_HI
0x002D	0x00	TIMESTAMP_P1_LO
0x002E	0x00	TIMESTAMP_P2_HI
0x002F	0x00	TIMESTAMP_P2_LO
0x0030	0x00	TIMESTAMP_P3_HI
0x0031	0x00	TIMESTAMP_P3_LO
0x0032	0x12	CSI_PORT_SEL
0x0033	0x03	CSI_CTL
0x0034	0x00	CSI_CTL2
0x0035	0x10	CSI_STS
0x0036	0x00	CSI_TX_ICR
0x0037	0x0F	CSI_TX_ISR
0x0041	0xA9	SFILTER_CFG
0x0042	0x71	AEQ_CTL
0x0043	0x01	AEQ_ERR_THOLD
0x0046	0x20	BCC_ERR_CTL
0x0047	0x00	BCC_STATUS
0x004A	0x00	FPD3_CAP
0x004B	0x12	RAW_EMBED_DTYPE
0x004C	0x12	FPD3_PORT_SEL
0x004D	0x41	RX_PORT_STS1
0x004E	0x04	RX_PORT_STS2
0x004F	0x42	RX_FREQ_HIGH
0x0050	0xAB	RX_FREQ_LOW
0x0051	0x00	SENSOR_STS_0
0x0052	0x00	SENSOR_STS_1
0x0053	0x00	SENSOR_STS_2
0x0054	0x00	SENSOR_STS_3
0x0055	0x00	RX_PAR_ERR_HI
0x0056	0x00	RX_PAR_ERR_LO
0x0057	0x00	BIST_ERR_COUNT
0x0058	0x58	BCC_CONFIG
0x0059	0x00	DATAPATH_CTL1
0x005B	0xB0	SER_ID
0x005C	0x1A	SER_ALIAS_ID
0x005D	0x00	TARGET_ID_0
0x005E	0x00	TARGET_ID_1
0x005F	0x00	TARGET_ID_2
0x0060	0x00	TARGET_ID_3
0x0061	0x00	TARGET_ID_4
0x0062	0x00	TARGET_ID_5
0x0063	0x00	TARGET_ID_6
0x0064	0x00	TARGET_ID_7
0x0065	0x00	TARGET_ALIAS_0
0x0066	0x00	TARGET_ALIAS_1
0x0067	0x00	TARGET_ALIAS_2
0x0068	0x00	TARGET_ALIAS_3
0x0069	0x00	TARGET_ALIAS_4
0x006A	0x00	TARGET_ALIAS_5
0x006B	0x00	TARGET_ALIAS_6
0x006C	0x00	TARGET_ALIAS_7
0x006D	0x79	PORT_CONFIG
0x006E	0x88	BC_GPIO_CTL0
0x006F	0x88	BC_GPIO_CTL1
0x0070	0x2B	RAW10_ID
0x0071	0x2C	RAW12_ID
0x0072	0xE4	CSI_VC_MAP
0x0073	0x00	LINE_COUNT_1
0x0074	0x14	LINE_COUNT_0
0x0075	0x00	LINE_LEN_1
0x0076	0x03	LINE_LEN_0
0x0077	0xC5	FREQ_DET_CTL
0x0078	0x00	MAILBOX_0
0x0079	0x01	MAILBOX_1
0x007A	0x00	CSI_RX_STS
0x007B	0x00	CSI_ERR_COUNTER
0x007C	0x20	PORT_CONFIG2
0x007D	0x03	PORT_PASS_CTL
0x007E	0x00	SEN_INT_RISE_CTL
0x007F	0x00	SEN_INT_FALL_CTL
0x0090	0x00	Reserved
0x0091	0x00	CSI0_FRAME_COUNT_LO
0x0092	0x00	CSI0_FRAME_ERR_COUNT_HI
0x0093	0x00	CSI0_FRAME_ERR_COUNT_LO
0x0094	0x00	CSI0_LINE_COUNT_HI
0x0095	0x00	CSI0_LINE_COUNT_LO
0x0096	0x00	CSI0_LINE_ERR_COUNT_HI
0x0097	0x00	CSI0_LINE_ERR_COUNT_LO
0x0098	0x00	CSI1_FRAME_COUNT_HI
0x0099	0x00	CSI1_FRAME_COUNT_LO
0x009A	0x00	CSI1_FRAME_ERR_COUNT_HI
0x009B	0x00	CSI1_FRAME_ERR_COUNT_LO
0x009C	0x00	CSI1_LINE_COUNT_HI
0x009D	0x00	CSI1_LINE_COUNT_LO
0x009E	0x00	CSI1_LINE_ERR_COUNT_HI
0x009F	0x00	CSI1_LINE_ERR_COUNT_LO
0x00A5	0x1C	REFCLK_FREQ
0x00B0	0x00	IND_ACC_CTL
0x00B1	0x3A	IND_ACC_ADDR
0x00B2	0x00	IND_ACC_DATA
0x00B3	0x08	BIST_CTL
0x00B6	0x18	PAR_ERR_CTRL
0x00B8	0xFD	MODE_IDX_STS
0x00B9	0x33	LINK_ERROR_COUNT
0x00BA	0x83	FPD3_ENC_CTL
0x00BC	0x80	FV_MIN_TIME
0x00BE	0x00	GPIO_PD_CTL
0x00D0	0x00	PORT_DEBUG
0x00D2	0x94	AEQ_CTL2
0x00D3	0x1F	AEQ_STATUS
0x00D4	0x60	ADAPTIVE_EQ_BYPASS
0x00D5	0xF2	AEQ_MIN_MAX
0x00D6	0x00	SFILTER_STS_0
0x00D7	0x02	SFILTER_STS_1
0x00D8	0x00	PORT_ICR_HI
0x00D9	0x00	PORT_ICR_LO
0x00DA	0x00	PORT_ISR_HI
0x00DB	0x00	PORT_ISR_LO
0x00DC	0x00	FC_GPIO_STS
0x00DD	0x00	FC_GPIO_ICR
0x00DE	0x00	SEN_INT_RISE_STS
0x00DF	0x00	SEN_INT_FALL_STS
0x00F0	0x5F	FPD3_RX_ID0
0x00F1	0x55	FPD3_RX_ID1
0x00F2	0x42	FPD3_RX_ID2
0x00F3	0x39	FPD3_RX_ID3
0x00F4	0x36	FPD3_RX_ID4
0x00F5	0x30	FPD3_RX_ID5
0x00F8	0x00	I2C_RX0_ID
0x00F9	0x00	I2C_RX1_ID
0x00FA	0x00	I2C_RX2_ID
0x00FB	0x00	I2C_RX3_ID

3. After initialization is complete, can you repeatedly read the following error/status registers at a 1sec interval? 

→ after initialization is complete，and make sure the DVP signal was sended from Sensor Device, then i collect your asked register(i read 5 times,each time interval is 1s) show in below:

*** Running P960_933_RegisterRead.py ***
		RX1
		 Number of reading: N = 0
('960 Read Register (0x4d):', '0x41')
('960 Read Register (0x4e):', '0xc5')
('960 Read Register (0x55):', '0x0')
('960 Read Register (0x56):', '0x0')
('960 Read Register (0x73):', '0x0')
('960 Read Register (0x74):', '0x19')
('960 Read Register (0x75):', '0x0')
('960 Read Register (0x76):', '0x3')
('960 Read Register (0x7a):', '0x0')
('960 Read Register (0x7b):', '0x0')
('960 Read Register (0x90):', '0x0')
('960 Read Register (0x91):', '0x0')
('960 Read Register (0x92):', '0x0')
('960 Read Register (0x93):', '0x0')
('960 Read Register (0x94):', '0x0')
('960 Read Register (0x95):', '0x0')
('960 Read Register (0x96):', '0x0')
('960 Read Register (0x97):', '0x0')
('960 Read Register (0x98):', '0x0')
('960 Read Register (0x99):', '0x6')
('960 Read Register (0x9a):', '0x0')
('960 Read Register (0x9b):', '0x6')
('960 Read Register (0x9c):', '0x14')
('960 Read Register (0x9d):', '0x28')
('960 Read Register (0x9e):', '0x0')
('960 Read Register (0x9f):', '0x0')
('933 Read Register (0x0a):', '0x0')
('933 Read Register (0x0b):', '0x0')
('933 Read Register (0x0c):', '0x0')
------------------------------------------------------------------
		 Number of reading: N = 1
('960 Read Register (0x4d):', '0x41')
('960 Read Register (0x4e):', '0x4')
('960 Read Register (0x55):', '0x0')
('960 Read Register (0x56):', '0x0')
('960 Read Register (0x73):', '0x0')
('960 Read Register (0x74):', '0x19')
('960 Read Register (0x75):', '0x0')
('960 Read Register (0x76):', '0x3')
('960 Read Register (0x7a):', '0x0')
('960 Read Register (0x7b):', '0x0')
('960 Read Register (0x90):', '0x0')
('960 Read Register (0x91):', '0x0')
('960 Read Register (0x92):', '0x0')
('960 Read Register (0x93):', '0x0')
('960 Read Register (0x94):', '0x0')
('960 Read Register (0x95):', '0x0')
('960 Read Register (0x96):', '0x0')
('960 Read Register (0x97):', '0x0')
('960 Read Register (0x98):', '0x0')
('960 Read Register (0x99):', '0x0')
('960 Read Register (0x9a):', '0x0')
('960 Read Register (0x9b):', '0x0')
('960 Read Register (0x9c):', '0x0')
('960 Read Register (0x9d):', '0x0')
('960 Read Register (0x9e):', '0x0')
('960 Read Register (0x9f):', '0x0')
('933 Read Register (0x0a):', '0x0')
('933 Read Register (0x0b):', '0x0')
('933 Read Register (0x0c):', '0x0')
------------------------------------------------------------------
		 Number of reading: N = 2
('960 Read Register (0x4d):', '0x41')
('960 Read Register (0x4e):', '0x4')
('960 Read Register (0x55):', '0x0')
('960 Read Register (0x56):', '0x0')
('960 Read Register (0x73):', '0x0')
('960 Read Register (0x74):', '0x19')
('960 Read Register (0x75):', '0x0')
('960 Read Register (0x76):', '0x3')
('960 Read Register (0x7a):', '0x0')
('960 Read Register (0x7b):', '0x0')
('960 Read Register (0x90):', '0x0')
('960 Read Register (0x91):', '0x0')
('960 Read Register (0x92):', '0x0')
('960 Read Register (0x93):', '0x0')
('960 Read Register (0x94):', '0x0')
('960 Read Register (0x95):', '0x0')
('960 Read Register (0x96):', '0x0')
('960 Read Register (0x97):', '0x0')
('960 Read Register (0x98):', '0x0')
('960 Read Register (0x99):', '0x0')
('960 Read Register (0x9a):', '0x0')
('960 Read Register (0x9b):', '0x0')
('960 Read Register (0x9c):', '0x0')
('960 Read Register (0x9d):', '0x0')
('960 Read Register (0x9e):', '0x0')
('960 Read Register (0x9f):', '0x0')
('933 Read Register (0x0a):', '0x0')
('933 Read Register (0x0b):', '0x0')
('933 Read Register (0x0c):', '0x0')
------------------------------------------------------------------
		 Number of reading: N = 3
('960 Read Register (0x4d):', '0x41')
('960 Read Register (0x4e):', '0x4')
('960 Read Register (0x55):', '0x0')
('960 Read Register (0x56):', '0x0')
('960 Read Register (0x73):', '0x0')
('960 Read Register (0x74):', '0x19')
('960 Read Register (0x75):', '0x0')
('960 Read Register (0x76):', '0x3')
('960 Read Register (0x7a):', '0x0')
('960 Read Register (0x7b):', '0x0')
('960 Read Register (0x90):', '0x0')
('960 Read Register (0x91):', '0x0')
('960 Read Register (0x92):', '0x0')
('960 Read Register (0x93):', '0x0')
('960 Read Register (0x94):', '0x0')
('960 Read Register (0x95):', '0x0')
('960 Read Register (0x96):', '0x0')
('960 Read Register (0x97):', '0x0')
('960 Read Register (0x98):', '0x0')
('960 Read Register (0x99):', '0x0')
('960 Read Register (0x9a):', '0x0')
('960 Read Register (0x9b):', '0x0')
('960 Read Register (0x9c):', '0x0')
('960 Read Register (0x9d):', '0x0')
('960 Read Register (0x9e):', '0x0')
('960 Read Register (0x9f):', '0x0')
('933 Read Register (0x0a):', '0x0')
('933 Read Register (0x0b):', '0x0')
('933 Read Register (0x0c):', '0x0')
------------------------------------------------------------------
		 Number of reading: N = 4
('960 Read Register (0x4d):', '0x41')
('960 Read Register (0x4e):', '0x4')
('960 Read Register (0x55):', '0x0')
('960 Read Register (0x56):', '0x0')
('960 Read Register (0x73):', '0x0')
('960 Read Register (0x74):', '0x19')
('960 Read Register (0x75):', '0x0')
('960 Read Register (0x76):', '0x3')
('960 Read Register (0x7a):', '0x0')
('960 Read Register (0x7b):', '0x0')
('960 Read Register (0x90):', '0x0')
('960 Read Register (0x91):', '0x0')
('960 Read Register (0x92):', '0x0')
('960 Read Register (0x93):', '0x0')
('960 Read Register (0x94):', '0x0')
('960 Read Register (0x95):', '0x0')
('960 Read Register (0x96):', '0x0')
('960 Read Register (0x97):', '0x0')
('960 Read Register (0x98):', '0x0')
('960 Read Register (0x99):', '0x0')
('960 Read Register (0x9a):', '0x0')
('960 Read Register (0x9b):', '0x0')
('960 Read Register (0x9c):', '0x0')
('960 Read Register (0x9d):', '0x0')
('960 Read Register (0x9e):', '0x0')
('960 Read Register (0x9f):', '0x0')
('933 Read Register (0x0a):', '0x0')
('933 Read Register (0x0b):', '0x0')
('933 Read Register (0x0c):', '0x0')
------------------------------------------------------------------



*** Script execution time 0 min 6.304 sec ***
>

looking forward to your reply, thank you

Best Regards,

Gongbin

Hi Gong bin,

Thank you for your detailed reply.

Your register read indicates several errors in register 0x4E on the first readback. Note that this is expected as many errors can be flagged during initialization. The first readback clears these errors.

After the first readback, there are no errors flagged in 960 or 933 registers. 960 register 0x4D=0x41 indicates there is stable lock, however the receiver input does not meet PASS criteria. I see in your configuration that register 0x7D=0x03, meaning PASS is only asserted after 3 valid frames are received. Can you try changing this to 0x7D=0x00 to see if this resolves the issue?

Counters in registers 0x73-0x76 indicate that there are 25 lines/frame and 3 bytes/line detected by the 960 RX port. These values seem incorrect for a typical imager. What imager are you using and how is it connected to the 933EVM? Can you double check the imager configuration is correct?

I see in your configuration 0x71=0x2C, meaning the 960 will decode input data as RAW12 format. Can you confirm if this is the correct video format? The value will need to be changed if a different format is used.

Does your imager use embedded lines? If it does, the configuration in register 0x4B may need to be changed.

Best,

Lucas