Any restriction on rump rate of the power for LMH1983

Mita-san

I am not aware of any power supply ramp sensitivity on the LMH1983.  The device has some voltage regulators internal to it which regulate the 3.3V rail down to 2.5 - providing a clean and isolated power rail for each PLL independant of the others.   My only concern with a very fast ramp would be if the bypassing network began to ring, then you could get issues related to that.

Mark Sauerwald

Mark-san,

Thank you for the answer.
Please allow me to confirm some more things bellows:

Q1. Can LMH1983 be used as long as the rum up time between 1ms to 100 ms?
 Some of the FPGA device specifies this parameters between 50 us to 50 ms
    Can the similar parameters be utilized to LMH1983?

Q2. Can the rump up time be comprehended the time between the tinstance the
supply voltage exceeds 0.5V and the morment it reaches to 3.3V-5%?

Q3. When recycle the power to the LMH1983, the supply voltage may need to
Reach to 0V to assure the proper operation.
Can voltage bellow 0.5V be assumed to be 0V?
Otherwise, you need to wait recycle power for substantial long period.

We need to tape out PCB before the end of this week. So, appreciate it if can give us
feedback with quantitative parameters by tomorrow.

 Mita

Mita-san

A1 - The LMH1983 should be fine with ramp rates between 1ms and 100ms.   Some circuits have issues with slow ramps because of intermittent triggering of power on reset ciruits. I have no knowledge of this problem affecting the LMH1983.

A2- Yes, the ramp rate could be considered 0.5V to 3.3-5%.

A3, during cycling of the power, and voltage below a diode drop would be low enough to force the part to reset.

Mark Sauerwald