Part Number: PCA9306
Tool/software:
Hello,
The datasheet does not specify what the input leakage current is when Vin = 0V and EN = 0. Can you help specify this use case?
I have a design where the I2C SDA2/SCL2 are pulled-up to 3.3V rail that is ON, while VREF2, VREF1 and EN are OFF.
I want to know if the high-impedance state of the internal FETs can be guaranteed in this state and if the input leakage current spec applies to this scenario.
Thanks!
