We have a design using the TMDS181 in between a source HDMI camera and an HDMI to SDI bridge. The output from the TMDS181 seems to be intermittent until we set bit 1 of register 0Ch of (MISC CONTROL Register Field). The problem is this register bit is marked as "Reserved".
We found this purely by accident while setting the register to "00" - No de-emphasis and "01" 2dB de-emphasis. Option "11" was accidentally seleced and the video started working. Then all option for bit 0 and 1 were tried and it was found that the bit responsible fo the video output was bit 1 being set to 1 ("10").
Can you provide some insight as to what this bit is responsible for? Is there something else causing the video failure? What is it these "Reserved" bits arre actually controlling.