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Original question:

TCA9535: ticf & tocf timing

MSP430F5244: I2C and SPI specs

Toshio Katsura
Prodigy 200 points

Part Number: MSP430F5244

We use "MSP430F5244" as I2C and SPI master device.
Could you let us know following questions.

1) Input rise and fall time specs
  Could you let met know MSP430F5244" input rise (Tr) and fall (Tf) time specs of SDA for I2c, SDI for SPI?

2) I2C and SPI output drivability.
 Can I change output drivability of I2C and SPI signals in "MSP430F5244"?

  • 0
    Guru 320660 points

    1. The MSP has Schmitt-trigger inputs, i.e., there are no restrictions.

    2. You can configure the drive strength of the output pins with the PxDS.y bits; also see sections 8.10/8.11 of the MSP430F5244 datasheet.

  • 0 in reply to Clemens Ladisch
    Prodigy 200 points

    Dear Clemens,

    Thank you for your reply.

    > The MSP has Schmitt-trigger inputs

    Are all inputs configured Schmitt-trigger in default? or configured by register?

    > You can configure the drive strength of the output pins with the PxDS.y bits

    In MSP430x5xx and MSP430x6xx Family User's Guide
    "13. Port Mapping Controller"
    Table 13-1. Examples for Port Mapping Mnemonics and Functions

    The following comments are written,
    > PM_UCB0SIMO USCI_B0 SPI slave in master out (direction controlled by USCI)
    > PM_UCB0SDA USCI_B0 I2C data (open drain and direction controlled by USCI)
    ...

    Selected PxSEL Bit=1, PxOUT, PxDIR are controlled by USCI.
    While configuring USCI, is it possible to set the Output Drive Strength Registers (PxDS)?
    And which "Digital I/O Operation" register (PxXX) can I configure?

  • 0 in reply to Toshio Katsura
    Prodigy 200 points

    Dear Clemens, and TI teams,

    Could you update about above questions?

  • 0 in reply to Clemens Ladisch
    Prodigy 200 points

    Dear Clemens, and TI teams,

    Could you update about  additional questions?

  • 0 in reply to Toshio Katsura
    TI__Mastermind 30386 points

    Hi Toshio,

    I checked datasheet, we does only have those information as below:

    By the way, is there issue encountered till now?

    Thanks!

    Best Regards

    Johnson

  • 0 in reply to Johnson He
    Prodigy 200 points

    Thank you for your reply.

    As you mentioned, the datasheet provides very limited information.
    Currently, we are using the MSP430F5244 as an I2C master, but the SCL and SDA outputs from the MSP430F5244 fall too quickly compared to the I2C standard.

    > You can configure the drive strength of the output pins with the PxDS.y bits

    We have set the PxDS.y bits to the weakest setting, but the drive strength of these pins still seems too high.

    We would like to find a way to reduce the output strength using another register.

    If you have any additional advice on how to slow down the falling edge, please let us know.

  • +1 in reply to Toshio Katsura
    TI__Mastermind 30386 points

    Hi Toshio,

    No other options from my experiences.....

    Thanks!

    Best Regards

    Johnson