TCA9517-Q1: TCA9517-Q1 I2C questions

Part Number: TCA9517-Q1


Hi Team,

We want to use TCA9517-Q1 as I2C buffer, and here are a few questions for this TCA9517-Q1 IC:
(1) If the master I2C device is an I2C analog with GPIO, is this still applicable?
(2) How many (3~4) device addresses are terminated from the device, is such a topology network supported?

image.png

 

  • Hi Kevin,

    (1) If the master I2C device is an I2C analog with GPIO, is this still applicable?

    I am not sure what you fully mean by "I2C analog with GPIO." Are you saying the customer is using GPIO's to control SDA and SCL by bit-banging? This is still okay given that the GPIO's are open-drain. 

    (2) How many (3~4) device addresses are terminated from the device, is such a topology network supported?

    The provided image will work as long as targets A/B/C all have unique I2C device addresses. 

    Regards,

    Tyler