Part Number: DS160PT801
Hello
we are using only x2 Lane of the DS160PT801 Retimer in our design and we are are not able to write into the SRIS_EN Register. reading the device ID work find but it's also not possible to have a link Training with PCIe device connected to the retimer.
we only use x2 Lane from DS160PT801 Retimer in our design and we are not able to write in the SRIS_EN register. Reading the device ID is working correctly but it is also not possible to have a link training with the PCIe device connected to the retimer.
what is the correct Method to modify the configuration of the retimer via the SMD Bus?
What configuration is required to have a PCIe Gen4 link training?
the PCIe Connection is done by using the channels A0/A1/B0/B1.
The Ref Clock and the sideband Signals are connected to the root complex SoC.
The mode pin is set to 1k PD.
The width pin is set to 10K PU.
One 8kbit EEPROM is also connected to the retimer.
