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DP83640: Synchronization with the microzed 7020 FPGA.

Haseeb Afzal Mir
Prodigy 110 points

Part Number: DP83640

Hi TI , 

We are looking to do IEEE 1588 timestamping for our ptp protocol for digital substation applications . Current we are struck with the GEM of Zynq as it does not provide any time stamping support on its PHY. 

So we're looking to connect the DP83640 Precision PHYTER™ - IEEE 1588 Precision Time Protocol Transceiver to the PL fabric pins and then use the GEM using EMIO to connect to the DP8340 . We will communicate with it using the emacpcdriver set and mdio. 

We have few quick questions . 

1. Would it be able to sync and connect to the Zynq boards Mdio and drivers . 
2.  Its has its own drivers . Can it be accessed through zynq processor or there are some specifications ? 
3. Also the pps pulse will need to configured ? 
4. Do we need to know anything else before going for it or is there a better product out there for timestamping and ptp applications ?

  • 0
    TI__Mastermind 26771 points

    Hi, 

    1. It would be able to sync and connect to Zynq boards' MDIO.
    2. We have linux driver support for it. 
    3. PPS pulse will have to be configured to be outputted. 
    4. This part can do 100M. Currently, TI does not have PTP solution for 1G. 

    Best,
    J

  • 0 in reply to J
    Prodigy 110 points

    100M is fine for me.

    Thanks.
    One more quick question.


    So my pipeline is like 8 paralell pipelined 16-bit adc data currently sampled at 2 Ksps but my transmission rate is 4000 samples / sec only . Current its being sampled on a free running clock . 
    So would you suggest me run the ptp sync first then the pps pulse will be synchronized with the ptp clock . Then from there i start the conversion and counter =0 . 

    But i am using axi-lite then to transmit the data packets from my hdl code . Would that be a problem . or would you suggest writing the ethernet protocol in hdl itself ? or it would have much effect ?

  • 0 in reply to Haseeb Afzal Mir
    TI__Mastermind 26771 points

    Hi,

    I would suggest to do a ptp sync so the pps pulse will be synchronized to the ptp clock. This way, your data will be guaranteed to be clocked by the synchronized clock.

    AXI bus should be fine to transmit the data. However, the ethernet data would already be in MII format. Are you going to convert MII to AXI? It should be okay to do either way, but directly taking in MII format of data will definitely have less latency than translating for AXI bus.

    Best,

    J

  • 0 in reply to J
    Prodigy 110 points

    The way I understand it ( correct me if i am wrong please). 
    DP83640 module receives the ptp packets and timestamps them and send them to Zynq via MDIO register. Then we have out ptp software stack which aligns the zynq clock with the ptp clock and gives out a pps which is synched with it. 

    Then I would use this synched pps to generate my packets and put a count on them (in registers) . I am not using Bram or DDR as sample to be sent are small 4000 samples/S even though i am sampling at higher rate and then choose the packets to be sent based on my timer interrupt and axi-slave registers . 

  • 0 in reply to Haseeb Afzal Mir
    TI__Mastermind 26771 points

    Hi, 

    Once the packet is timestamped, the packet will be sent to the FPGA via MII/RMII interface. The PHY will add timestamp to the packet so you don't have to read the PHY register via MDIO bus unless you prefer to do so. 

    Yes, the MAC can be synced with the PHY clock via 1588 Clock output, or you can sync the PHY with the clock from the MAC by inputting the clock into the PHY via 1588 clock input. 


    Haseeb Afzal Mir said:
    Then I would use this synched pps to generate my packets and put a count on them (in registers) . I am not using Bram or DDR as sample to be sent are small 4000 samples/S even though i am sampling at higher rate and then choose the packets to be sent based on my timer interrupt and axi-slave registers . 

    For this, are you thinking of using 1588 event triggering so you can track when to send the packets out? If so, yes your intuition would be correct. 

    Best,
    J