Part Number: DS100BR410
Dear Support Team,
I have a technical question regarding the DS100BR410 (quad-channel redriver). I am considering using the device in a PCIe Gen3 application and would like your confirmation on two points:
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Is it acceptable to use the DS100BR410 to redrive a single PCIe 3.0 data lane (one differential pair) while simultaneously using one of the device’s other channels to re-drive the PCIe reference clock (i.e. using a channel as a clock redriver)?
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If using a data channel for the clock is not recommended, do you offer (or recommend) a dedicated HCSL clock buffer that is suitable for PCIe reference clock distribution and that meets low jitter/HCSL requirements? Preferably we are looking for parts with automotive qualification (AEC-Q100) or rad-hard variants - if those exist, could you point us to the recommended part numbers?
Thank you in advance for your help.
Best regards,
Michał