LMH1297: LMH1297RTVT schematics verification

Hi Irfan, 

For both devices, I recommend selecting output controls that do not drive unused outputs. 

Address looks good. 

The settings are good for 12G. 

Please refer to the table below for current consumption of the device:


Best,
J

Hi J,

What is the I/O level of the SDI Lock signal ?

Regards,
Irfan

Hi Irfan,

LOCK_N signal will be VDD or 0V.

Best,

J

HI J,

Could you please tell whether the SDI_IO+/- and SDI_OUT+/- is a single ended 75E signal?
As per the schematics i have shared for the review, one output is connected to the connector and another is grounded through capacitor and 75E resistor. So both should be considered as 75E impedance and routed as group or separate or any guidelines has to be followed up.

Regards,
Irfan

Hi Irfan,

In your design, they both go out to BNC connectors. So, they should both be 75 ohm single ended. 
For details on the layout, please refer to datasheet section 11 as it discusses guidelines for both BNC connection and SDI_IO and SDI_OUT traces.

Best,

J

Hi J,

The SDI_IO+ is routed with 75E impedance then what about the SDI_IO-   ?
Same with SDI_OUT-    ?

In the above highlighted signal , will that also be 75E?
And below is attached image of how we have routed.

Regards,
Irfan

Hi Irfan,

Your understanding is correct. You can also refer to LMH1297EVM layout for reference in the user’s guide.

Best,

J