DS160PT801: Can't link device

Hi Jeff,

Can you try the attached EEPROM file, this is a default file used for x4.

DS160PT801_4x4.zip

Regards,

Undrea

Hi Undrea,

Programming the HEX file fails (other HEX files fail as well).

REFCLK_OUT+ (Y19) and REFCLK_OUT– (V19) are connected to the downstream device, but these two pins currently have no clock output, and the reference board does not have it either.

The spec states that the Re-Timer firmware needs to be enabled.
The current Re-Timer firmware requirements are as follows:

1. Address: 0x28

2. PCIe bandwidth: one x8

3. REFCLK OUT Enable

Hi Undrea,

Currently, modifying the configuration allows REFCLK_OUT+ (Y19) and REFCLK_OUT– (V19) to output a clock.
However, after making these changes, how do we save them into the HEX file?
We saved the configuration to a file, but after the board is powered off, REFCLK_OUT+ (Y19) and REFCLK_OUT– (V19) no longer output a clock.

The M.2 SSD is detected after the Re-Timer, but only at Gen1 speed, and there are many red “Signal Detect” errors.

Jeff

Hi Undrea,

Any suggestion for this issue? thanks!

Jeff

Hi Undrea,

The device connection is fine now.

1.But we have tried to follow the "DS160PT801 EEPROM Configuration Guide" to flash new setting from sigcon GUI to EEPROM always fail.

We have check EEPRPM WP pin is connect GND.

Now we use "Write Register Button" tried to write register data to EEPROM. But seems EEPROM data table have no changes.

We also tried to "Write to EEPROM Hex Button", But the .hex we generated seems very strange.

Do you have any other EEPROM Write guide or SOP can share to us?

2. And another question is DS160PT801 have any auto detction function?

Is DS160PT801 possible to auto detction end device to set to x2/x4/x8?

3. How to correspond below Die0/1 channel with GUI chennel and DS160PT801 pinout?

Thank!

Jeff

Hi Jeff,

I'm trying to locate a EEPROM guide for this device(I don't believe it exists), I may need to get this from a similar device EVM User's guide.

There is no autodetect feature to configure the number of lanes for this retimer.

Regards,

Undrea

Hi Undrea,

Now we have can modify most of register setting into EEPROM.

But only two register value we can't modify.

We set the high level page "Bifurcation Options" to 2x4, this setting we have check modified low level page register value 0xF2/0xF3.

And we write 0xF2/0xF3 value change to EEPROM check it modified before PC reboot.

But after PC reboot, seems is change back to default.

Do you have any idea?

Or this two register needs other step to correct flash to EEPROM?

And please hlep us check above question 3.

3. How to correspond below Die0/1 channel with GUI chennel and DS160PT801 pinout?

Thanks!

Jeff

Hi Jeff,

We were able to duplicate the issue in configuring the EEPROM to set the lane width.  The EEPROM load only loads the share registers and not the global registers.  The global registers(Setting the width) can be written via SMBus but not EEPROM, I'm also trying to verify this internally.

Lane width setting is latched via pin-strapping of the WIDTH pin(Setting to level 1 - 10k to GND).

Regarding the mapping, DIE0 is the Manager and DIE 1 is the Follower in the GUI.

On the EVM, the routing is as follows:

PCIe Lane[3:0] = Die1 (U2)

PCIe Lanes [7:4] = Die 0 (U2)

PCIe Lanes [8:11] = Die 1 (U3)

PCIe Lanes [15:12] = Die 0 (U3)

Regards,

Undrea

Hi Undrea,

We still have two questions.

1. is it able to set as bypass mode from GUI? Or there is another way to set as bypass by hardware?
   We would like to confirm whether our design is correct or not before the retimer problems are solved.
2. Is it able to set PCIe from x8 to x4/x4?

Thanks!

Jeff

Hi Jeff,

1. There is no bypass mode available.  The retimer is always active.

2. Yes, the device supports x4 configuration. WIDTH pin = Level 1

Hi Undrea,

Got it, thanks!

Jeff

Hi Undrea,

Regarding BY mode:
We would like to compare the behavior of the Re-Timer in two conditions:

1. with signal enhancement and noise filtering enabled, and

2. without signal enhancement and without noise filtering.

Is there a way to configure the Re-Timer so that it operates without signal enhancement and without noise filtering?

Also, regarding the previous question: since modifying the bifurcation setting through the GUI is not possible, how can this configuration be saved into the EEPROM?

We were able to duplicate the issue in configuring the EEPROM to set the lane width.  The EEPROM load only loads the share registers and not the global registers.  The global registers(Setting the width) can be written via SMBus but not EEPROM, I'm also trying to verify this internally.

Thanks!

Jeff

Hi Jeff,

There's no setting to disable the signal conditioning in the retimer.  The retimer has automatic adaptive equalization which selects the best gain settings for the channel.

Regarding the link-width, there may be a solution to program via eeprom, I am investigating this and will provide an update today(Will provide an EEPROM image to test).

Hi Jeff, please see attached EEPROM image for x4 configuration. I confirmed this is working as expected.

In the GUI, please follow this sequence to load:

1. Load From Hex File

2. Write to EEPROM

3. Read from EEPROM

Now the registers should be updated, and the same EEPROM configuration should be read after power cycle.

https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/138/DS160PT801_5F00_4x4x4x4.hex

Regards,

Undrea

Hi Undrea,

There is another question about retimer signal, we aware that there is no bypass mode, but what if we can set the signal enhance as low as it can, maybe it can be seen as “bypass”, could you please suggest what registers can be set to reduce the enhancement? Thanks.

Jeff

Hi Jeff,

Below is the sequence that needs to written to each die address to set EQ to the lowest level.   You can refer to the DS160PT801 Programming Guide for these settings as well.

0xFF = 0x80 Enable Diex Shared register set
0x6B = 0x00 (Port A Gen 1 and Gen 2 CTLE = 0)
0x6C = 0x00 (Port A Gen 3 and Gen 4 CTLE = 0)
0x6D = 0x00 (Port B Gen 1 and Gen 2 CTLE = 0)
0x6E = 0x00 (Port B Gen 3 and Gen 4 CTLE = 0)
0x73 = 0xA0 (Enable CTLE override port A)
0x73 = 0x60 (Enable CTLE override port B)

Regards,

Undrea

Hi Undrea,

1. Regarding the WIDTH issue:
On our hardware, the WIDTH pin is pulled up with a 10 kΩ resistor to PWR_1 (1.8 V), but after entering the GUI, it is still shown as x16.

2. For CLKREQ#:
How can CLKREQ# be forced low through firmware?
We tried setting register 0xFA = 0x30, but it had no effect.

3. The values I modify always fail and cannot be saved to the EEPROM.
My steps are as follows — please confirm whether they are correct:
3-1. Read from EEPROM
3-2. Edit register 0xFA to 0x30
3-3. Write to EEPROM
3-4. Power off
3-5. Power on
3-6. Check register 0xFA (reads back as 0x00)

Thanks!

Jeff

Hi Jeff,

Do you have an endpoint connected when reading the width in the GUI?

For CLKREQ#, you have the correct register bits set.  Note, CLKREQ# may have a PUI or PD on the EVM board (J16, please see if this is no-connect, or try pulling to GND and see if the status changes).

CLKREQ# is a global register, this may be a limit of the GUI to add global registers to the EEPROM but may need to be added manually. 

Is the intent to keep CLKREQ# low all the time?

You can try this EEPROM image for CLKREQ#.https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/138/DS160PT801_5F00_4x4_5F00_clkreq.hex

Hi Undrea,

Regarding the DS160PT801_4x4_clkreq.hex file you provided: When I load this file into the GUI, it displays a 4x2 / 1x8 configuration. However, our current hardware is a 1x8 (Single chip) setup. I have been unable to successfully modify the EEPROM settings to 1x8 on my end.

Could you please help us build a new firmware (FW) with the following requirements?

• Re-Timer Address: 0x28 (Single chip)

• PCIe Bandwidth: 1 x8 (Single chip)

• REFCLK OUT: Enabled

• CLKREQ#: Keep low at all times

Thanks!

Jeff

Hi Jeff,

The WIDTH pin should be floating if setting via EEPROM.  Re-timer address is set by hardware pins not EEPROM.  Please see attached image with x8, REFCLKout enabled and CLKREQ asserted.

https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/138/DS160PT801_5F00_.x8_5F00_clkreq_5F00_refclkout.hex

Regards,

Undrea

Hi Undrea,

The file you provided works perfectly. Thank you!

1. If we change the WIDTH to Float in the HW, will the FW be able to determine whether it is x8 or x4x4?

   

2. Following up on the previous question: how do we modify it to x8 or x4x4?

3. Also, how can we save the changes to the EEPROM after the modification?

Hi Undrea,

"The DS160PT801_.x8_clkreq_refclkout.hex file you provided previously seems to have some issues:

• On the EVM Board: After flashing the firmware, the graphics card fails to display, and the OS cannot detect the device. The measured voltage at Re-timer Pin B11 (CLKREQ) is 0V.

• On the EFOCU8B Board: Similarly, there is no display and the device is not detected in the OS. However, the Re-timer Pin B11 (CLKREQ) measures 0.6V (it is expected to be 0V).

Questions:

1. Why is the CLKREQ voltage at 0.6V on the this design?

2. Why does the system fail to display or detect the device after setting CLKREQ=LOW (Register 0xFA = 0x30)?

   The GUI indicates that the Channel status is in a 'RESET' state."

   

Hi Undrea,

Any update for above questions? thanks!

Jeff

Hi Jeff,

We apologize for the delay. It seems like when DS160PT801_.x8_clkreq_refclkout.hex was initially shared, it worked as expected. Did anything in the EEPROM image or hardware setup change? Please also share the EEPROM image currently being used while this issue is seen.

Best regards,

Greg

Hi Greg,

The initial "Pass" result might have been inaccurate because the system may not have been power-cycled at that time. Note that I did not modify the values in the original DS160PT801_.x8_clkreq_refclkout.hex file. During the current testing process, a full power cycle was performed after every EEPROM programming.

image.zip

Test Observations

• Case 1: EVM Board

  • Scenario: Programmed with the HEX file and connected to a GPU.

  • Result: No display; device not detected by the OS.

  • Measurement: After removing the J16 jumper, Pin B11 (CLKREQ#) measured 0V.

  • Note: Prior to programming the HEX file, this pin measured 0.6V.

• Case 2: EFOCU8B Board

  • Scenario: Programmed with the HEX file and connected to a GPU.

  • Result: No display; device not detected by the OS.

  • Measurement: Pin B11 (CLKREQ#) measured 0.6V (expected value is 0V).

  • Note: Pin B11 was in a floating state during this measurement.

Modified HEX File Results

The attached HEX file contains my modifications. The results are as follows:

1. FW Code NOT set to CLKREQ# Low (0xFA = 0x30):

   • Actual Physical Measurement: Pin B11 is Low.

2. FW Code SET to CLKREQ# Low (0xFA = 0x30):

   • Actual Physical Measurement: The GPU still fails to display.

Hi Jeff,

Thanks for the clarification. I will try to replicate this on my end and will get back to you as soon as possible.

Best regards,

Greg