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DS80PCI402: Question About Differential Pair Swapping Within the Same Channel Group

Adrian Adrian
Prodigy 10 points

Part Number: DS80PCI402

Dear Technical Support Team,

I am planning to use the DS80PCI402 in a new design and I would like to confirm two technical points.

1. Differential pair swapping within the same channel group


For layout reasons and to better match my pinout, I would like to know whether it is allowed to swap differential pairs within the same group/channel, as long as the polarity (N/P) is preserved.
For example, can the pair Tx_0_N / Tx_0_P be routed instead to Tx_3_N / Tx_3_P, and vice-versa?
Please confirm whether such internal channel swapping is electrically acceptable for the DS80PCI402, or if each differential pair must be routed strictly to its corresponding pins.

2. Use of AC-coupling capacitors on TX/RX lines


In the datasheet and on the official evaluation board, AC-coupling capacitors (0.22 µF) are placed in series on the TX and RX differential pairs.
Is this also recommended in a scenario where the DS80PCI402 is located on a backplane, and both plug-in boards connected to the backplane already include their own AC-coupling capacitors on the same differential links?
In other words, should additional capacitors be placed on the backplane near the DS80PCI402, or should they be omitted to avoid multiple series capacitors on the same lane?

Thank you in advance for your support.

Best regards, Adrian

  • 0
    TI__Genius 12490 points

    Hi Adrian,

    1. For the redriver, it does not matter which lane order is routed through the device, but PCIe supports lane reversal only so all lanes would need to be changed in order (ie, lanes 7:0 could be routed as lanes 0:7), the lanes cannot be randomly re-ordered in PCIe.

    2. AC-coupling caps are required at the Tx outputs only, they are not required at the Rx input (It is assumed the corresponding Tx will have the ac-coupling caps present).  Adding additional caps is not generally recommended, the 220nF cap value is used as this in series with another 100nF cap that may be present will still put the total capacitance within the spec range.

    Regards,

    Undrea

  • 0 in reply to Undrea Fields
    Prodigy 10 points

    Hi, Thank you very much for the quick reply.

    A few points to confirm, just to make sure our implementation is fully correct:

    1. It is of course clear that individual differential pairs within a PCIe group cannot be arbitrarily swapped — PCIe cannot handle random lane remapping. Only full lane reversal is allowed.
      Therefore, as I understand it, the following connection to the DS80PCI402SQ should be acceptable, since it represents a complete lane-order reversal:

      • pins 1 & 2 (OUTB_0+ / OUTB_0–) → PCIE_RX3_P / PCIE_RX3_N

      • pins 3 & 4 (OUTB_1+ / OUTB_1–) → PCIE_RX2_P / PCIE_RX2_N

      • pins 5 & 6 (OUTB_2+ / OUTB_2–) → PCIE_RX1_P / PCIE_RX1_N

      • pins 7 & 8 (OUTB_3+ / OUTB_3–) → PCIE_RX0_P / PCIE_RX0_N

      Please confirm that this complete lane reversal is acceptable for PCIe operation when using the DS80PCI402.

    2. Regarding the AC-coupling capacitors:
      We fully understand that AC-coupling is required only at the TX side, and since our devices already include these capacitors, this is straightforward.

      However, I would like to clarify the recommendations based on your documentation:

      • In the photo/diagram from the datasheet, 220 nF capacitors appear to be placed at every differential pair pin of the device (see attachment).

      • In another schematic representation, capacitors are shown only on one side of the device (also attached).

      Because of these inconsistencies, I would like to confirm the official recommendation:

      a) When using the DS80PCI402SQ/NOP in a backplane design, where the backplane connects to plug-in boards on both sides — and those boards already contain the required AC-coupling capacitors — do we need to place additional capacitors on the backplane?
      If yes, on which exact pins of the DS80PCI402 should they be placed?

      b) In general, do you recommend placing the AC-coupling capacitors near the connectors (as on your dev board), or directly next to the DS80PCI402 (as implied by some diagrams)?
      Which placement is preferred for best signal integrity and compliance with the PCIe specification?

    Thanks again for your support — your clarification will help us ensure the correct implementation of the device and avoid issues such as double AC-coupling or missing capacitors.

     

  • 0 in reply to Adrian Adrian
    TI__Genius 12490 points

    Hi Adrian,

    Point #1 is correct, the lane reversal is acceptable.

    For #2, I see the confusion here.  The diagram in the datasheet is a system-level representation, there should only be one ac-coupling cap between devices (It is the device Tx output that is responsible for having the ac-coupling cap in place).  

    The evaluation kit uses SMA connectors as the interface (To connect to equipment for testing), so this board places ac-coupling caps on both Tx and Rx since the equipment generating the signals may not have ac-coupled outputs.

    Our more current EVMs are add-in card designs(For more functional testing) which only have the ac-coupling caps on the Tx outputs.

    Regarding the placement of the ac-coupling caps, we typically recommend they be placed near the middle of the trace or closer to the connector.  Placing the caps too close to the device could cause some small reflections, these are dampened when placed further from the device.

    Hope this clears things up.

    Regards,

    Undrea