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LMH0397: LMH0397 - High speed differential standard and data rate support

Rich Brindha
Prodigy 35 points

Part Number: LMH0397

Hi,
We are using LMH0397RTVT 3G SDI Equalizer & Cable driver in our design.
1) The differential standard of IN+, IN-, OUT+ & OUT- pins are not mentioned in the datasheet. 
   Which differential standard does this chip support (CML or LVDS or any other standard)?
2) We are planning to interface this chip with MGT bank of AMD FPGA. Can we interface with FPGA MGT Bank?
3) Also confirm max data rate of this high speed differential interface of LMH0397.
4) If we use Belden 1694A cable, How much distance and data rate does it support for 3G SDI Interface?
5) Is there any other concerns we need to look into for using this chip for 3G SDI Interface?

  • 0
    TI__Guru**** 189941 points

    Hi,

    For IN+/-, please see the spec below. The IN0 has an on-chip 100-Ω termination and is designed for AC coupling, requiring a 4.7-μF, AC-coupling capacitor for minimizing base-line wander.

    For OUT+/-, please see the spec below.

    I am not familiar with the MGT bank of the AMD FPGA, but please double check and make sure the LMH0397 output electrical spec can meet the AMD FPGA MGT electrical spec.

    The LMH0397 locks to all supported SMPTE data rates up to 2.97 Gbps.

    For cable reach in the EQ mode,

    EQ mode cable reach (Belden 1694A, SDI_OUT Disabled):

    – 200 m at 2.97 Gbps

    – 300 m at 1.485 Gbps

    – 600 m at 270 Mbps

    Thanks

    David