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DP83TC812S-Q1: 812 phy link issue

Part Number: DP83TC812S-Q1

We currently have a project bringing up the PHY of an 812 chip and want to manually switch from standby to normal mode. We've tried setting 0x1C4B to register 0x18b, but this isn't working. Could you please provide a solution?

 

  • Hi Yang,

    I have a few questions in order to better understand your issue:

    • Are you able to read registers back from PHY?  This confirms PHY is not in sleep mode.
    • Are you using indirect register access sequence?  This is detailed in "Extended Register Space Access" of data sheet.
    • Have you tried strapping PHY into autonomous mode.  If so, is there any difference in behavior?
    • What link partner are you using?  Is there any link partner dependency?

    Thanks,

    Drew

  • Hi Drew Miller1:

    • Are you able to read registers back from PHY?  This confirms PHY is not in sleep mode.

            ------- yes , we can read and write register success

    • Are you using indirect register access sequence?  This is detailed in "Extended Register Space Access" of data sheet.

            -------- yes , we reference this to access the mdio register

    • Have you tried strapping PHY into autonomous mode.  If so, is there any difference in behavior?

            -------- yes ,we try to rework the board to remove resistor then the phy go to auto mode , the phy could link. and the eth data could transfer success

    • What link partner are you using?  Is there any link partner dependency?

            --------I used vector to test link and eth data transfer

    Thank you

  • Hi Yang,

    • After writing 0x18B = 0x1C4B, can you read back 0x18B to confirm register is set correctly?
    • Is DP83TC812 configured as master or slave?  If you switch master/slave, does this impact behavior?
    • You could try PHY soft reset 0x1F = 0x4000 to see if this impacts behavior.

    Thanks,

    Drew

  • Hi Drew Miller1:

    • After writing 0x18B = 0x1C4B, can you read back 0x18B to confirm register is set correctly?

             ------ yes , set success, and read back value is 0x1C4B

    • Is DP83TC812 configured as master or slave?  If you switch master/slave, does this impact behavior?

           ----- we config is as 100base-t1 slave, switch master and slave is not imapct something 

    • You could try PHY soft reset 0x1F = 0x4000 to see if this impacts behavior.

           ------ I set it , still could not link and set after I read back 0x1f is always 0.

    Tank you

  • Hi Yang,

    Apologies for the delay.

    Which version of the open alliance configuration script are you using?

    https://www.ti.com/lit/an/snla389f/snla389f.pdf

    Thanks,

    Drew

  • Hi Drew Miller1:

    this issue is just impact one hardware ,so that I test more hardware this issue is not exist. so it is the hardware issue.

    thank you for your support

  • Hi Drew Miller

    Do you have the linux driver for this phy.

    we need enable it in linux side

    Thank you

  • Hi Yang,

    Thanks for the update, good to confirm that this is hardware issue.

    We have linux driver here:

    https://github.com/TexasInstruments/ti-ethernet-software/blob/main/linux_drivers/dp83tc812.c

    Thanks,

    Drew